On Sat, Apr 13, 2013 at 7:26 PM, Rafał Miłecki <zajec5@xxxxxxxxx> wrote:
>
> Signed-off-by: Rafał Miłecki <zajec5@xxxxxxxxx>
> ---
> drivers/gpu/drm/radeon/evergreen_hdmi.c | 14 ++++++++++++++
> drivers/gpu/drm/radeon/radeon_display.c | 5 +++++
> 2 files changed, 19 insertions(+)
>
> diff --git a/drivers/gpu/drm/radeon/evergreen_hdmi.c b/drivers/gpu/drm/radeon/evergreen_hdmi.c
> index 4fdecc2..8b64bf1 100644
> --- a/drivers/gpu/drm/radeon/evergreen_hdmi.c
> +++ b/drivers/gpu/drm/radeon/evergreen_hdmi.c
> @@ -143,6 +143,13 @@ void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode
>
> WREG32(HDMI_GC + offset, 0); /* unset HDMI_GC_AVMUTE */
>
> + /*
> + * At this point fglrx reads following regs:
> + * DCE41: 0x49c
> + * DCE5: 0x480 0x484 0x488
> + * Is that something audio related?
> + */
> +
Those are DCPLL dividers. Nothing to do with audio. That's just the
driver setting the display engine PLL (probably calling
SetPixelClock).
> err = drm_hdmi_avi_infoframe_from_display_mode(&frame, mode);
> if (err < 0) {
> DRM_ERROR("failed to setup AVI infoframe: %zd\n", err);
> @@ -158,6 +165,13 @@ void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode
> evergreen_hdmi_update_avi_infoframe(encoder, buffer, sizeof(buffer));
> evergreen_hdmi_update_ACR(encoder, mode->clock);
>
> + /*
> + * At this point fglrx changes following regs:
> + * DCE41: 0x7a70
> + * DCE5: 0x7a70 and 0x64ec
> + * Is that something audio related?
> + */
> +
Ox7a70 is CRTC_CONTROL for crtc1 (CRTC_CONTRL + crtc_offset[1]).
> /* it's unknown what these bits do excatly, but it's indeed quite useful for debugging */
> WREG32(AFMT_RAMP_CONTROL0 + offset, 0x00FFFFFF);
> WREG32(AFMT_RAMP_CONTROL1 + offset, 0x007FFFFF);
> diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c
> index e38fd55..a83c272 100644
> --- a/drivers/gpu/drm/radeon/radeon_display.c
> +++ b/drivers/gpu/drm/radeon/radeon_display.c
> @@ -1261,6 +1261,11 @@ static void radeon_afmt_init(struct radeon_device *rdev)
> rdev->mode_info.afmt[1]->offset = EVERGREEN_CRTC1_REGISTER_OFFSET;
> rdev->mode_info.afmt[1]->id = 1;
> }
> + /*
> + * According to the commens above we should use !DCE41 || DCE5,
> + * condition, however there isn't any DCE5 that is DCE41, so
> + * DCE5 check is not needed.
> + */
It would probably be more obvious to just loop over rdev->num_crtc
since the number of hdmi blocks matches the number of crtcs.
Alex
> if (!ASIC_IS_DCE41(rdev)) {
> rdev->mode_info.afmt[2] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);
> if (rdev->mode_info.afmt[2]) {
> --
> 1.7.10.4
>
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