This format is an odd beast, implemented by Renesas R-Car hardware. It
stores RGB 6:6:6 pixels in 32 bits as
[31:0] x:R:x:G:x:B:x 8:6:2:6:2:6:2 little endian
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@xxxxxxxxxxxxxxxx>
---
Hello,
I came across this weird format on a Renesas SoC display controller. This is
essentially XRGB8888 with the two low order bits of each component ignored by
the hardware.
The proposed name is intentionally over-descriptive to trigger comments
(hopefully resulting in a proposal for a better name :-)).
To be honest I'm not too sure what kind of use case such a format could have.
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index f2d667b..7e1a19d 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -2210,6 +2210,7 @@ static int format_check(const struct drm_mode_fb_cmd2 *r)
case DRM_FORMAT_BGR565:
case DRM_FORMAT_RGB888:
case DRM_FORMAT_BGR888:
+ case DRM_FORMAT_XRGB8626262:
case DRM_FORMAT_XRGB8888:
case DRM_FORMAT_XBGR8888:
case DRM_FORMAT_RGBX8888:
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index 646ae5f..1f01161 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -67,6 +67,8 @@
#define DRM_FORMAT_BGR888 fourcc_code('B', 'G', '2', '4') /* [23:0] B:G:R little endian */
/* 32 bpp RGB */
+#define DRM_FORMAT_XRGB8626262 fourcc_code('X', 'R', '1', '8') /* [31:0] x:R:x:G:x:B:x 8:6:2:6:2:6:2 little endian */
+
#define DRM_FORMAT_XRGB8888 fourcc_code('X', 'R', '2', '4') /* [31:0] x:R:G:B 8:8:8:8 little endian */
#define DRM_FORMAT_XBGR8888 fourcc_code('X', 'B', '2', '4') /* [31:0] x:B:G:R 8:8:8:8 little endian */
#define DRM_FORMAT_RGBX8888 fourcc_code('R', 'X', '2', '4') /* [31:0] R:G:B:x 8:8:8:8 little endian */
--
Regards,
Laurent Pinchart
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