Replace the deprecated drm_bridge_funcs.mode_fixup() with drm_bridge_funcs.atomic_check(). drm_bridge_funcs.atomic_check() requires the atomic state operations, update these to the default implementations. Signed-off-by: Sam Ravnborg <sam@xxxxxxxxxxxx> Cc: Andrzej Hajda <andrzej.hajda@xxxxxxxxx> Cc: Neil Armstrong <narmstrong@xxxxxxxxxxxx> Cc: Robert Foss <robert.foss@xxxxxxxxxx> Cc: Laurent Pinchart <Laurent.pinchart@xxxxxxxxxxxxxxxx> Cc: Jonas Karlman <jonas@xxxxxxxxx> Cc: Jernej Skrabec <jernej.skrabec@xxxxxxxxx> Cc: Benson Leung <bleung@xxxxxxxxxxxx> Cc: Guenter Roeck <groeck@xxxxxxxxxxxx> Cc: chrome-platform@xxxxxxxxxxxxxxx --- drivers/gpu/drm/bridge/cros-ec-anx7688.c | 28 +++++++++++++++--------- 1 file changed, 18 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/bridge/cros-ec-anx7688.c b/drivers/gpu/drm/bridge/cros-ec-anx7688.c index 0f6d907432e3..fc19ea87926f 100644 --- a/drivers/gpu/drm/bridge/cros-ec-anx7688.c +++ b/drivers/gpu/drm/bridge/cros-ec-anx7688.c @@ -5,6 +5,7 @@ * Copyright 2020 Google LLC */ +#include <drm/drm_atomic_state_helper.h> #include <drm/drm_bridge.h> #include <drm/drm_print.h> #include <linux/i2c.h> @@ -45,9 +46,10 @@ bridge_to_cros_ec_anx7688(struct drm_bridge *bridge) return container_of(bridge, struct cros_ec_anx7688, bridge); } -static bool cros_ec_anx7688_bridge_mode_fixup(struct drm_bridge *bridge, - const struct drm_display_mode *mode, - struct drm_display_mode *adjusted_mode) +static int cros_ec_anx7688_bridge_atomic_check(struct drm_bridge *bridge, + struct drm_bridge_state *bridge_state, + struct drm_crtc_state *crtc_state, + struct drm_connector_state *conn_state) { struct cros_ec_anx7688 *anx = bridge_to_cros_ec_anx7688(bridge); int totalbw, requiredbw; @@ -56,13 +58,13 @@ static bool cros_ec_anx7688_bridge_mode_fixup(struct drm_bridge *bridge, int ret; if (!anx->filter) - return true; + return 0; /* Read both regs 0x85 (bandwidth) and 0x86 (lane count). */ ret = regmap_bulk_read(anx->regmap, ANX7688_DP_BANDWIDTH_REG, regs, 2); if (ret < 0) { DRM_ERROR("Failed to read bandwidth/lane count\n"); - return false; + return ret; } dpbw = regs[0]; lanecount = regs[1]; @@ -71,28 +73,34 @@ static bool cros_ec_anx7688_bridge_mode_fixup(struct drm_bridge *bridge, if (dpbw > 0x19 || lanecount > 2) { DRM_ERROR("Invalid bandwidth/lane count (%02x/%d)\n", dpbw, lanecount); - return false; + return -EINVAL; } /* Compute available bandwidth (kHz) */ totalbw = dpbw * lanecount * 270000 * 8 / 10; /* Required bandwidth (8 bpc, kHz) */ - requiredbw = mode->clock * 8 * 3; + requiredbw = crtc_state->mode.clock * 8 * 3; DRM_DEBUG_KMS("DP bandwidth: %d kHz (%02x/%d); mode requires %d Khz\n", totalbw, dpbw, lanecount, requiredbw); if (totalbw == 0) { DRM_ERROR("Bandwidth/lane count are 0, not rejecting modes\n"); - return true; + return 0; } - return totalbw >= requiredbw; + if (totalbw < requiredbw) + return -EINVAL; + + return 0; } static const struct drm_bridge_funcs cros_ec_anx7688_bridge_funcs = { - .mode_fixup = cros_ec_anx7688_bridge_mode_fixup, + .atomic_check = cros_ec_anx7688_bridge_atomic_check, + .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state, + .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state, + .atomic_reset = drm_atomic_helper_bridge_reset, }; static int cros_ec_anx7688_bridge_probe(struct i2c_client *client) -- 2.34.1