On Mon, Feb 25, 2013 at 07:55:18PM -0300, Rodrigo Vivi wrote:
> From: Shobhit Kumar <shobhit.kumar@xxxxxxxxx>
>
> Signed-off-by: Shobhit Kumar <shobhit.kumar@xxxxxxxxx>
>
> v2: reuse of just created is_edp_psr and put it at right place.
>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
> Reviewed-by: Jani Nikula <jani.nikula@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_dp.c | 13 +++++++++++++
> drivers/gpu/drm/i915/intel_drv.h | 1 +
> 2 files changed, 14 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index b4494a2..5cfa9f4 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -1437,6 +1437,12 @@ static void intel_post_disable_dp(struct intel_encoder *encoder)
> }
> }
>
> +static bool is_edp_psr(struct intel_dp *intel_dp)
> +{
> + return (is_edp(intel_dp) &&
> + (intel_dp->psr_dpcd[0] & DP_PSR_IS_SUPPORTED));
This should probably also check the setup time vs. vblank restriction.
> +}
> +
> static void intel_enable_dp(struct intel_encoder *encoder)
> {
> struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
> @@ -2117,6 +2123,13 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
> if (intel_dp->dpcd[DP_DPCD_REV] == 0)
> return false; /* DPCD not present */
>
> + /* Check if the panel supports PSR */
> + memset(intel_dp->psr_dpcd, 0, sizeof(intel_dp->psr_dpcd));
> + intel_dp_aux_native_read_retry(intel_dp, DP_PSR_SUPPORT,
> + intel_dp->psr_dpcd,
> + sizeof(intel_dp->psr_dpcd));
> + if (is_edp_psr(intel_dp))
> + DRM_DEBUG_KMS("Detected EDP PSR Panel.\n");
> if (!(intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] &
> DP_DWN_STRM_PORT_PRESENT))
> return true; /* native DP sink */
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 005a91f..865ede6 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -375,6 +375,7 @@ struct intel_dp {
> uint8_t link_bw;
> uint8_t lane_count;
> uint8_t dpcd[DP_RECEIVER_CAP_SIZE];
> + uint8_t psr_dpcd[EDP_PSR_RECEIVER_CAP_SIZE];
> uint8_t downstream_ports[DP_MAX_DOWNSTREAM_PORTS];
> struct i2c_adapter adapter;
> struct i2c_algo_dp_aux_data algo;
> --
> 1.8.1.2
>
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--
Ville Syrjälä
Intel OTC
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