On Tue, Jan 22, 2013 at 7:55 PM, David Woodhouse <dwmw2@xxxxxxxxxxxxx> wrote: > On Mon, 2013-01-21 at 19:48 +0100, Daniel Vetter wrote: >> We already have the quirk entry for the mobile platform, but also >> reports on some desktop versions. So be paranoid and set it >> everywhere. >> >> References: http://www.mail-archive.com/dri-devel@xxxxxxxxxxxxxxxxxxxxx/msg33138.html >> Cc: stable@xxxxxxxxxxxxxxx >> Cc: David Woodhouse <dwmw2@xxxxxxxxxxxxx> >> Reported-and-tested-by: Mihai Moldovan <ionic@xxxxxxxx> >> Signed-off-by: Daniel Vetter <daniel.vetter@xxxxxxxx> >> --- >> drivers/iommu/intel-iommu.c | 8 +++++++- >> 1 file changed, 7 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c >> index 9743769..19854bf 100644 >> --- a/drivers/iommu/intel-iommu.c >> +++ b/drivers/iommu/intel-iommu.c >> @@ -4215,13 +4215,19 @@ static void __devinit quirk_iommu_rwbf(struct pci_dev *dev) >> { >> /* >> * Mobile 4 Series Chipset neglects to set RWBF capability, >> - * but needs it: >> + * but needs it. Same seems to hold for the desktop versions. >> */ >> printk(KERN_INFO "DMAR: Forcing write-buffer flush capability\n"); >> rwbf_quirk = 1; >> } >> >> DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2a40, quirk_iommu_rwbf); >> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e00, quirk_iommu_rwbf); >> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e10, quirk_iommu_rwbf); >> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e20, quirk_iommu_rwbf); >> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e30, quirk_iommu_rwbf); >> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e40, quirk_iommu_rwbf); >> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e90, quirk_iommu_rwbf); >> >> #define GGC 0x52 >> #define GGC_MEMORY_SIZE_MASK (0xf << 8) > > Again, I'm really unhappy about doing this kind of thing based on > hearsay. This should have a specific reference (with URL) to a published > erratum. Rajesh? Any updates here? I'd like to include this for 3.9 -next with cc: stable to finally allow distros to enable DMAR/IOMMU support by default on Intel hw. The current state of affairs is simply embarrassing imo :( -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/dri-devel
