On Thu, Jan 31, 2013 at 12:54 PM, Rahul Sharma <r.sh.open@xxxxxxxxx> wrote:
> I have parsed the related code and it looks fine to me. I couldn't find
> any code section, expecting sg-tables with single-page sgl entries. I
> just want to ensure again that it doesn't cause any side effects on
> various platforms.
Just chatted with Chris Wilson on our team, and at last i915.ko _has_
code paths which rely on this. See the reloc handling offset
computations in i915_gem_execbuf.c. I haven't checked
ttm/radeon/nouveau/vmwgfx simply because I don't have the time right
now, and I know that doing this carefully will blow through a few
days. So this patch will break prime buffer sharing on the desktop.
The other thing is that only doing sg entry coalescing for
prime/dma_buf will lead to a QA problem, since all the normal sg
tables still have a 1:1 relationship. So imo the right way to move
forward with this is to convert the various sg table constructors in
i915/ttm/radeon/nouveau/... over to coalesce pages. This allows us to
fix any fallout step-by-step.
Then, once each driver is ready for this, we can merge your patch.
>> For the patch itself I think there's now a generic pages_to_sg helper
>> in the dma core which does exactly what you want it to do. I can dig
>> it out if you can't find it.
>>
>
> Sorry, I din't get this part. Please elaborate a bit.
See sg_alloc_table_from_pages in lib/scatterlist.c introduced with:
commit efc42bc98058a36d761b16a114823db1a902ed05
Author: Tomasz Stanislawski <t.stanislaws@xxxxxxxxxxx>
Date: Mon Jun 18 09:25:01 2012 +0200
scatterlist: add sg_alloc_table_from_pages function
Cheers, Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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