On 10.07.2021 03:20, Vinay Belgaumkar wrote:
> Add helpers to read the min/max frequency being used
> by SLPC. This is done by send a h2g command which forces
s/h2g/H2G
> SLPC to update the shared data struct which can then be
> read.
>
> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@xxxxxxxxx>
> Signed-off-by: Sundaresan Sujaritha <sujaritha.sundaresan@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 58 +++++++++++++++++++++
> drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h | 2 +
> 2 files changed, 60 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
> index 19cb26479942..98a283d31734 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
> @@ -278,6 +278,35 @@ int intel_guc_slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 val)
> return ret;
> }
>
> +int intel_guc_slpc_get_max_freq(struct intel_guc_slpc *slpc, u32 *val)
> +{
> + struct slpc_shared_data *data;
> + intel_wakeref_t wakeref;
> + struct drm_i915_private *i915 = guc_to_gt(slpc_to_guc(slpc))->i915;
> + int ret = 0;
> +
> + wakeref = intel_runtime_pm_get(&i915->runtime_pm);
> +
> + /* Force GuC to update task data */
> + if (slpc_read_task_state(slpc)) {
> + DRM_ERROR("Unable to update task data");
use drm_err
missing \n
maybe this message could be moved to slpc_read_task_state ?
> + ret = -EIO;
> + goto done;
> + }
> +
> + GEM_BUG_ON(!slpc->vma);
> +
> + drm_clflush_virt_range(slpc->vaddr, sizeof(struct slpc_shared_data));
maybe this can also be part of slpc_read_task_state ?
> + data = slpc->vaddr;
> +
> + *val = DIV_ROUND_CLOSEST(data->task_state_data.max_unslice_freq *
> + GT_FREQUENCY_MULTIPLIER, GEN9_FREQ_SCALER);
> +
> +done:
> + intel_runtime_pm_put(&i915->runtime_pm, wakeref);
> + return ret;
> +}
> +
> /**
> * intel_guc_slpc_min_freq_set() - Set min frequency limit for SLPC.
> * @slpc: pointer to intel_guc_slpc.
> @@ -312,6 +341,35 @@ int intel_guc_slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 val)
> return ret;
> }
>
> +int intel_guc_slpc_get_min_freq(struct intel_guc_slpc *slpc, u32 *val)
missing kernel-doc (above intel_guc_slpc_min_freq_set has one)
> +{
> + struct slpc_shared_data *data;
> + intel_wakeref_t wakeref;
> + struct drm_i915_private *i915 = guc_to_gt(slpc_to_guc(slpc))->i915;
> + int ret = 0;
> +
> + wakeref = intel_runtime_pm_get(&i915->runtime_pm);
> +
> + /* Force GuC to update task data */
> + if (slpc_read_task_state(slpc)) {
> + DRM_ERROR("Unable to update task data");
see above
> + ret = -EIO;
> + goto done;
> + }
> +
> + GEM_BUG_ON(!slpc->vma);
> +
> + drm_clflush_virt_range(slpc->vaddr, sizeof(struct slpc_shared_data));
see above
Michal
> + data = slpc->vaddr;
> +
> + *val = DIV_ROUND_CLOSEST(data->task_state_data.min_unslice_freq *
> + GT_FREQUENCY_MULTIPLIER, GEN9_FREQ_SCALER);
> +
> +done:
> + intel_runtime_pm_put(&i915->runtime_pm, wakeref);
> + return ret;
> +}
> +
> /*
> * intel_guc_slpc_enable() - Start SLPC
> * @slpc: pointer to intel_guc_slpc.
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h
> index a473e1ea7c10..2cb830cdacb5 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h
> @@ -36,5 +36,7 @@ int intel_guc_slpc_enable(struct intel_guc_slpc *slpc);
> void intel_guc_slpc_fini(struct intel_guc_slpc *slpc);
> int intel_guc_slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 val);
> int intel_guc_slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 val);
> +int intel_guc_slpc_get_max_freq(struct intel_guc_slpc *slpc, u32 *val);
> +int intel_guc_slpc_get_min_freq(struct intel_guc_slpc *slpc, u32 *val);
>
> #endif
>
