Hi Maxime On Thu, 20 May 2021 at 16:03, Maxime Ripard <maxime@xxxxxxxxxx> wrote: > > Hi, > > The composite output in the BCM2711 is dealt using the VEC. While the earlier > SoCs were properly supported, it wasn't functional on the BCM2711. Add the > needed support from the RPi downstream kernel. Thanks for upstreaming these. As far as I'm concerned they're all good, but DT bindings aren't an area of expertise for me. Patches 1&3: Reviewed-by: Dave Stevenson <dave.stevenson@xxxxxxxxxxxxxxx> Patches 2&4: Acked-by: Dave Stevenson <dave.stevenson@xxxxxxxxxxxxxxx> This is going to need firmware from 23rd March 2021 or later in order to ensure that the VEC can use an integer divider from the PLL. PLLC was rejigged to run at 2592MHz so that /24 gives the VEC the 108MHz clock it requires. (Before that it needed a special config.txt option to set the PLLs appropriately). Dave > Maxime > > Mateusz Kwiatkowski (4): > drm/vc4: Fix clock source for VEC PixelValve on BCM2711 > dt-bindings: display: bcm2835-vec: Add BCM2711 compatible > drm/vc4: Separate VEC compatible variants > ARM: boot: dts: bcm2711: Add BCM2711 VEC compatible > > .../bindings/display/brcm,bcm2835-vec.yaml | 4 ++- > arch/arm/boot/dts/bcm2711.dtsi | 1 + > drivers/gpu/drm/vc4/vc4_crtc.c | 2 +- > drivers/gpu/drm/vc4/vc4_vec.c | 27 +++++++++++++++---- > 4 files changed, 27 insertions(+), 7 deletions(-) > > -- > 2.31.1 >
