Thank's comment
and I will modify description of Exynos5 series. and than I will send it.
On 10/26/2012 11:43 PM, Inki Dae wrote:
2012/10/18 Eunchul Kim <chulspro.kim@xxxxxxxxxxx>:
Hi All.
I am responsible for a display part from Samsung Electronics Telecommunication Division.
and I am going to add post-processing features in exynos drm.
If you have some opinion of this patch,
please give some comments about my patch.
IPP is stands for Image Post Processing and supports image scaler/rotator
and input/output DMA operations using IPP drivers(FIMC, Rotator, GSC, SC, so on.)
IPP is integration device driver of same attibute hardware.
Please add more descriptions. Actually, GSC is a new hardware for
Exynos5xxx SoC and later. So please, leave descriptions enough. ie. in
case of Exynos4xxx SoCs, Image scaler, rotator and color space
conversion had been processed by FIMC hardware. But as you know, in
case of Exynos5xxx and layer, they are processed by GSC. And also the
GSC can be used instead of Exynos4xxx's Video Processor. So such
things should be described enough.
OK I will add more descriptions.
IPP drivers supports Memory to Memory operations with various converting.
and some drivers supports Writeback and Display output operations using local path.
User can make converted image using this driver.
and also supports streaming concept for multimedia data processing.
And supports various operations
1. Scale operation generates various sizes of image.
2. CSC(Color Space Conversion) operation supports format converting.
3. Crop operation supports cutting the image.
4. Rotate operation supports to 90, 180, 270 degree.
5. Flip operation supports to vertical, horizontal, and both.
6. Writeback operation genertates cloned image from display controller(FIMD).
7. Display output operation support various format display to display controller(FIMD).
8. Input DMA reads image data from the memory.
9. Output DMA writes image data to memory.
10. Supports image effect functions.
Descriptions)
User should make property informations and set this property to registers.
and IPP subsystem manages property id using command node and make queue list using memory node.
IPP subsystem supports register function of IPP drivers.
IPP driver manages input/output DMA with various operations. and some driver supports
optional operations(writeback, output).
IPP driver needs various informations, so User set property information to IPP driver.
and also IPP driver needs memory base address of image for various operations.
User doesn't know its address, so fills the gem handle of that memory than address of image base.
and than IPP driver start operation.
We adds four ioctls and one event for IPP subsystem.
Basic control flow is same as below
Open -> Get properties -> User choose IPP driver and set property information -> Set Property -> Create gem handle ->
Queue buffer(Enqueue) of source/destination -> Command control(Play) -> Event occured to User
-> User handle converted image -> (Queue buffer(Enqueue) of source/destination -> Event occured to User)*N ->
Queue buffer(Dequeue) of source/destination -> Command control(Stop) -> Free gem handle -> Close
The above descriptions are not enough. Please add test application so
that other people can understand your patch set. And let's start as
RFC this time.
Do you want to attach ipptest application in libdrm ?
- ioctls
DRM_EXYNOS_IPP_GET_PROPERTY : get ipp driver capabilitis and id.
DRM_EXYNOS_IPP_SET_PROPERTY : set format, position, rotation, flip about source/destination.
DRM_EXYNOS_IPP_QUEUE_BUF : enqueue/dequeue buffer and make event list.
DRM_EXYNOS_IPP_CMD_CTRL : play/stop/pause/resume control.
- event
DRM_EXYNOS_IPP_EVENT : event to give notification completion of buffer DMA with buffer list
Eunchul Kim (4):
drm/exynos: add ipp subsystem
drm/exynos: add fimc ipp driver
drm/exynos: add rotator ipp driver
drm/exynos: add gsc ipp driver
drivers/gpu/drm/exynos/Kconfig | 24 +
drivers/gpu/drm/exynos/Makefile | 4 +
drivers/gpu/drm/exynos/exynos_drm_drv.c | 69 +
drivers/gpu/drm/exynos/exynos_drm_drv.h | 10 +
drivers/gpu/drm/exynos/exynos_drm_fimc.c | 2041 +++++++++++++++++++++++++++
drivers/gpu/drm/exynos/exynos_drm_fimc.h | 35 +
drivers/gpu/drm/exynos/exynos_drm_gsc.c | 1476 +++++++++++++++++++
drivers/gpu/drm/exynos/exynos_drm_gsc.h | 35 +
drivers/gpu/drm/exynos/exynos_drm_ipp.c | 1937 +++++++++++++++++++++++++
drivers/gpu/drm/exynos/exynos_drm_ipp.h | 268 ++++
drivers/gpu/drm/exynos/exynos_drm_rotator.c | 801 +++++++++++
drivers/gpu/drm/exynos/exynos_drm_rotator.h | 13 +
drivers/gpu/drm/exynos/regs-fimc.h | 669 +++++++++
drivers/gpu/drm/exynos/regs-gsc.h | 295 ++++
drivers/gpu/drm/exynos/regs-rotator.h | 73 +
include/drm/exynos_drm.h | 33 +
include/uapi/drm/exynos_drm.h | 189 +++
17 files changed, 7972 insertions(+), 0 deletions(-)
create mode 100644 drivers/gpu/drm/exynos/exynos_drm_fimc.c
create mode 100644 drivers/gpu/drm/exynos/exynos_drm_fimc.h
create mode 100644 drivers/gpu/drm/exynos/exynos_drm_gsc.c
create mode 100644 drivers/gpu/drm/exynos/exynos_drm_gsc.h
create mode 100644 drivers/gpu/drm/exynos/exynos_drm_ipp.c
create mode 100644 drivers/gpu/drm/exynos/exynos_drm_ipp.h
create mode 100644 drivers/gpu/drm/exynos/exynos_drm_rotator.c
create mode 100644 drivers/gpu/drm/exynos/exynos_drm_rotator.h
create mode 100644 drivers/gpu/drm/exynos/regs-fimc.h
create mode 100644 drivers/gpu/drm/exynos/regs-gsc.h
create mode 100644 drivers/gpu/drm/exynos/regs-rotator.h
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