From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Check the active and primary_disabled flags and set the
DISPLAY_PLANE_ENABLE bit accordingly in calc_plane() hook for the
primary plane.
Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
---
drivers/gpu/drm/i915/intel_display.c | 10 ++++++++++
1 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 6a1ed7e..43cff11 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2026,6 +2026,11 @@ static int i9xx_calc_plane(struct drm_crtc *crtc, struct drm_framebuffer *fb,
regs->cntr &= ~DISPPLANE_TILED;
}
+ if (intel_crtc->active && !intel_crtc->primary_disabled)
+ regs->cntr |= DISPLAY_PLANE_ENABLE;
+ else
+ regs->cntr &= ~DISPLAY_PLANE_ENABLE;
+
linear_offset = fb->offsets[0] + y * fb->pitches[0] + x * cpp;
if (INTEL_INFO(dev)->gen >= 4) {
@@ -2133,6 +2138,11 @@ static int ironlake_calc_plane(struct drm_crtc *crtc,
/* must disable */
regs->cntr |= DISPPLANE_TRICKLE_FEED_DISABLE;
+ if (intel_crtc->active && !intel_crtc->primary_disabled)
+ regs->cntr |= DISPLAY_PLANE_ENABLE;
+ else
+ regs->cntr &= ~DISPLAY_PLANE_ENABLE;
+
linear_offset = fb->offsets[0] + y * fb->pitches[0] + x * (fb->bits_per_pixel / 8);
intel_crtc->dspaddr_offset =
gen4_compute_dspaddr_offset_xtiled(&x, &y,
--
1.7.8.6
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