From: Krishna Manikandan <mkrishn@xxxxxxxxxxxxxx> This change adds the interconnect bindings to the MDSS node. This will establish Display to DDR path for bus bandwidth voting. Changes in v2: - Change in commit message(Matthias Kaehlcke) Changes in v3: - Updated commit message to include reviewer's name in v2 Signed-off-by: Krishna Manikandan <mkrishn@xxxxxxxxxxxxxx> --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 998f101..4f2c0d1 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -1522,6 +1522,9 @@ interrupt-controller; #interrupt-cells = <1>; + interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>; + interconnect-names = "mdp0-mem"; + iommus = <&apps_smmu 0x800 0x2>; #address-cells = <2>; -- 1.9.1 _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
