On Tue, Aug 14, 2012 at 10:36 AM, Michel Dänzer <michel@xxxxxxxxxxx> wrote:
> On Don, 2012-08-09 at 10:57 -0400, Jerome Glisse wrote:
>> On Thu, Aug 9, 2012 at 10:34 AM, Marek Olšák <maraeo@xxxxxxxxx> wrote:
>> >
>> > diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
>> > index 637280f..be0e320 100644
>> > --- a/drivers/gpu/drm/radeon/r600.c
>> > +++ b/drivers/gpu/drm/radeon/r600.c
>> > @@ -3789,3 +3789,15 @@ static void r600_pcie_gen2_enable(struct radeon_device *rdev)
>> > WREG32_PCIE_P(PCIE_LC_LINK_WIDTH_CNTL, link_width_cntl);
>> > }
>> > }
>> > +
>> > +uint64_t r600_get_gpu_clock(struct radeon_device *rdev)
>> > +{
>> > + uint64_t clock;
>> > +
>> > + mutex_lock(&rdev->gpu_clock_mutex);
>> > + WREG32(RLC_CAPTURE_GPU_CLOCK_COUNT, 1);
>> > + clock = (uint64_t)RREG32(RLC_GPU_CLOCK_COUNT_LSB) |
>> > + ((uint64_t)RREG32(RLC_GPU_CLOCK_COUNT_MSB) << 32);
>>
>> I keep forgeting about c type rules but i think you want 32ULL
>
> Not sure why that would be needed (or why you'd want it if it's not :).
>
It's just about type conversion, i have been beat in the past by
operation ending up as unsigned with << 32 and of course that means 0
result which is not what you are looking for.
Cheers,
Jerome
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