Hi Sebastian, Thank you for the patch. On Tue, Feb 25, 2020 at 12:20:37AM +0100, Sebastian Reichel wrote: > This prepares the driver for becoming a mipi_dsi_host implementation, > which provides a generic transfer function instead of all kind of > different read/write functions. The implementation will become more > elegant after unexporting the specific functions in the following > patches. > > Signed-off-by: Sebastian Reichel <sebastian.reichel@xxxxxxxxxxxxx> > --- > drivers/gpu/drm/omapdrm/dss/dsi.c | 52 +++++++++++++++++++++++++++ > drivers/gpu/drm/omapdrm/dss/omapdss.h | 3 ++ > 2 files changed, 55 insertions(+) > > diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c b/drivers/gpu/drm/omapdrm/dss/dsi.c > index f01e0476296d..84e2eb0b51d7 100644 > --- a/drivers/gpu/drm/omapdrm/dss/dsi.c > +++ b/drivers/gpu/drm/omapdrm/dss/dsi.c > @@ -4836,6 +4836,56 @@ static void dsi_release_vc(struct omap_dss_device *dssdev, int channel) > } > } > > +static ssize_t omap_dsi_transfer(struct omap_dss_device *dssdev, > + const struct mipi_dsi_msg *msg) > +{ > + /* > + * no_sync can be used to optimize performance by sending > + * e.g. column and page information without syncing in > + * between. It's not absolutley required, so postpone this > + * feature for now. The 80 columns limit is quite small as it is, no need to make it even tighter :-) > + */ > + bool no_sync = false; > + u16 val; > + > + switch (msg->type) { > + case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM: > + case MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM: > + case MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM: > + case MIPI_DSI_GENERIC_LONG_WRITE: > + if (no_sync) > + return dsi_vc_generic_write_nosync(dssdev, msg->channel, > + msg->tx_buf, msg->tx_len); This uses spaces for indentation (and the result isn't aligned to (). > + else > + return dsi_vc_generic_write(dssdev, msg->channel, > + msg->tx_buf, msg->tx_len); > + case MIPI_DSI_DCS_SHORT_WRITE: > + case MIPI_DSI_DCS_SHORT_WRITE_PARAM: > + case MIPI_DSI_DCS_LONG_WRITE: > + if (no_sync) > + return dsi_vc_dcs_write_nosync(dssdev, msg->channel, > + msg->tx_buf, msg->tx_len); Misaligned indentation here too. > + else > + return dsi_vc_dcs_write(dssdev, msg->channel, > + msg->tx_buf, msg->tx_len); > + case MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM: > + case MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM: > + case MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM: > + return dsi_vc_generic_read(dssdev, msg->channel, msg->tx_buf, > + msg->tx_len, msg->rx_buf, msg->rx_len); And here. > + case MIPI_DSI_DCS_READ: > + return dsi_vc_dcs_read(dssdev, msg->channel, > + ((u8*) msg->tx_buf)[0], > + msg->rx_buf, msg->rx_len); And I think you get the message :-) > + case MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE: > + val = le16_to_cpu(*((__le16*) msg->tx_buf)); > + return dsi_vc_set_max_rx_packet_size(dssdev, msg->channel, val); > + case MIPI_DSI_NULL_PACKET: > + return dsi_vc_send_null(to_dsi_data(dssdev), msg->channel); > + } > + > + return -EINVAL; > +} > > static int dsi_get_clocks(struct dsi_data *dsi) > { > @@ -4890,6 +4940,8 @@ static const struct omap_dss_device_ops dsi_ops = { > .set_vc_id = dsi_set_vc_id, > .release_vc = dsi_release_vc, > > + .transfer = omap_dsi_transfer, > + > .dcs_write = dsi_vc_dcs_write, > .dcs_write_nosync = dsi_vc_dcs_write_nosync, > .dcs_read = dsi_vc_dcs_read, > diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h b/drivers/gpu/drm/omapdrm/dss/omapdss.h > index b909b3a8c835..ea7bf0970677 100644 > --- a/drivers/gpu/drm/omapdrm/dss/omapdss.h > +++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h > @@ -307,6 +307,9 @@ struct omapdss_dsi_ops { > void (*release_vc)(struct omap_dss_device *dssdev, int channel); > > /* data transfer */ > + ssize_t (*transfer)(struct omap_dss_device *dssdev, > + const struct mipi_dsi_msg *msg); Ditto. With those small issues fixed, Reviewed-by: Laurent Pinchart <laurent.pinchart@xxxxxxxxxxxxxxxx> > + > int (*dcs_write)(struct omap_dss_device *dssdev, int channel, > const u8 *data, int len); > int (*dcs_write_nosync)(struct omap_dss_device *dssdev, int channel, -- Regards, Laurent Pinchart _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel