On Tue, May 29, 2012 at 9:13 PM, <bugzilla-daemon@xxxxxxxxxxxxxxx> wrote: > --- Comment #75 from thor@xxxxxxxxxxxxxxxxx 2012-05-29 12:13:12 PDT --- > Well, I do have a documentation from National Semiconductors, but there is > nothing that would define frequencies or bandwidths - only the sync pulses can > be set, and intput to syncs. So I played writing values into all other > registers with i2cset, but with little success - not any change, actually, > except for the mentioned register. Ok, and you could block off the screen as > well by disabling the sync pulses (not much of a surprise, I guess). Well, most lvds panels have a fixed mode they work at. We fake different resolutions by using the hw scaler on the gpu's scanout unit. Still, having a dvo chip without any means to adjust that sounds a bit strange. > However, leaving all that aside - I'm no longer able to talk to the chip, upon > rebooting i2cdetect gave me all blanks on bus #6. I really wonder what is going > on. Could it be that there is some additional "gating" going on that blocks off > access to this chip unless another register is set? Is that typical? We do have some parts of the mmio space that need unlocking, but i2c devices should always respond. You might need to power cycle the machine to get it out of limbo though (i.e. yank the battery). -- Daniel Vetter daniel.vetter@xxxxxxxx - +41 (0) 79 364 57 48 - http://blog.ffwll.ch _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/dri-devel
