https://bugzilla.kernel.org/show_bug.cgi?id=205277 Bug ID: 205277 Summary: [amd powerplay] vega10: soc voltage for power state 7 is not changed by overdrive. Product: Drivers Version: 2.5 Kernel Version: 5.4.0-rc3 Hardware: All OS: Linux Tree: Mainline Status: NEW Severity: normal Priority: P1 Component: Video(DRI - non Intel) Assignee: drivers_video-dri@xxxxxxxxxxxxxxxxxxxx Reporter: pelle@xxxxxxxxxxx Regression: No Created attachment 285583 --> https://bugzilla.kernel.org/attachment.cgi?id=285583&action=edit debug patch Using Overdrive to set voltage and frequency on a vega10 card does not set the voltage for the highest power state (state 7). To reproduce: boot with kernel parameter 'amdgpu.ppfeaturemask=0xffffffff' cat pp_od_clk_voltage on boot: OD_SCLK: 0: 852Mhz 800mV 1: 991Mhz 900mV 2: 1138Mhz 950mV 3: 1269Mhz 1000mV 4: 1312Mhz 1050mV 5: 1474Mhz 1100mV 6: 1538Mhz 1150mV 7: 1590Mhz 1200mV OD_MCLK: 0: 167Mhz 800mV 1: 500Mhz 800mV 2: 700Mhz 900mV 3: 800Mhz 950mV OD_RANGE: SCLK: 852MHz 2400MHz MCLK: 167MHz 1500MHz VDDC: 800mV 1200mV set pp_od_clk_voltage: # cd /sys/class/drm/card0/device # echo "s 2 1138 910" > pp_od_clk_voltage # echo "s 3 1269 920" > pp_od_clk_voltage # echo "s 4 1312 930" > pp_od_clk_voltage # echo "s 5 1474 940" > pp_od_clk_voltage # echo "s 6 1538 950" > pp_od_clk_voltage # echo "s 7 1590 980" > pp_od_clk_voltage # echo "c" > pp_od_clk_voltage cat pp_od_clk_voltage: OD_SCLK: 0: 852Mhz 800mV 1: 991Mhz 900mV 2: 1138Mhz 910mV 3: 1269Mhz 920mV 4: 1269Mhz 920mV 5: 1474Mhz 940mV 6: 1538Mhz 950mV 7: 1590Mhz 980mV OD_MCLK: 0: 167Mhz 800mV 1: 500Mhz 800mV 2: 700Mhz 900mV 3: 800Mhz 950mV OD_RANGE: SCLK: 852MHz 2400MHz MCLK: 167MHz 1500MHz VDDC: 800mV 1200mV This all seems fine. The voltages are set for all the power states. But when stressing the gpu it still uses it's default of 1200mV for power state 7, as can be observed in amdgpu_pm_info: # cat /sys/kernel/debug/dri/0/amdgpu_pm_info ... GFX Clocks and Power: 800 MHz (MCLK) 1484 MHz (SCLK) 1269 MHz (PSTATE_SCLK) 700 MHz (PSTATE_MCLK) 1200 mV (VDDGFX) 260.0 W (average GPU) ... Using the attached patch to print the voltages that are actually being set to the vddc_lookup_table the output to dmesg is: ... [ 521.364502] amdgpu: [powerplay] vega10 SCLK vddc_lookup_table state: 0 vddc: 800 [ 521.364504] amdgpu: [powerplay] vega10 SCLK vddc_lookup_table state: 1 vddc: 900 [ 521.364504] amdgpu: [powerplay] vega10 SCLK vddc_lookup_table state: 2 vddc: 910 [ 521.364505] amdgpu: [powerplay] vega10 SCLK vddc_lookup_table state: 3 vddc: 920 [ 521.364505] amdgpu: [powerplay] vega10 SCLK vddc_lookup_table state: 4 vddc: 920 [ 521.364506] amdgpu: [powerplay] vega10 SCLK vddc_lookup_table state: 5 vddc: 940 [ 521.364506] amdgpu: [powerplay] vega10 SCLK vddc_lookup_table state: 6 vddc: 950 ... _Not_ printing state 7. So it appears the vddc value for state 7 is never set in the new lookup table. -- You are receiving this mail because: You are watching the assignee of the bug. _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
