Hi Mika, Thanks for your quick reply. > > 1. Why are there four bridge devices? 04:00.0, 04:01.0 and 04:02.0 > > look > > superfluous to me and nothing is connected to them. It actually > > gives > > me the feeling that the TB3 driver creates 4 devices with 2.5 GT/s > > each, instead of one device that can do the full 8 GT/s. > > Because it is standard PCIe switch with one upstream port and n > downstream ports. Sure, though in this case 3 of those downstream ports are not exposed by the hardware, so it's a bit surprising to see them there. Why I asked about it is because I have a suspicion that maybe the bandwidth is allocated equally between the 4 downstream ports, even though only one of them is used. > > > 2. Why are some of the bridge devices only capable of 2.5 GT/s > > according to lspci? > > You need to talk to lspci maintainer. Sorry if the question was unclear. It's not only lspci, the kernel also prints a warning about it. Like I said the device really is limited to 2.5 GT/s even though it should be able to do 8 GT/s. > > > 3. Is it possible to manually set them to 8 GT/s? > > No idea. > > Are you actually seeing some performance issue because of this or are > you just curious? Yes, I see a noticable performance hit: some games have very low frame rate while neither the CPU nor the GPU are fully utilized. (Side note: mesa 19.1 has a radeonsi patch that reduces the bandwidth use, which does help. However it doesn't solve the underlying problem of the slow TB3 interface.) Best regards, Tim _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
