On Mon, Jun 17, 2019 at 6:30 PM Jagan Teki <jagan@xxxxxxxxxxxxxxxxxxxx> wrote:
>
> On Sun, Jun 16, 2019 at 11:01 AM Chen-Yu Tsai <wens@xxxxxxxx> wrote:
> >
> > On Sat, Jun 15, 2019 at 12:44 AM Jagan Teki <jagan@xxxxxxxxxxxxxxxxxxxx> wrote:
> > >
> > > TCON TOP have clock gates for TV0, TV1, dsi and right
> > > now these are register during bind call.
> > >
> > > Of which, dsi clock gate would required during DPHY probe
> > > but same can miss to get since tcon top is not bound at
> > > that time.
> > >
> > > To solve, this circular dependency move the clock gate
> > > registration from bind to probe so-that DPHY can get the
> > > dsi gate clock on time.
> > >
> > > Signed-off-by: Jagan Teki <jagan@xxxxxxxxxxxxxxxxxxxx>
> > > ---
> > > drivers/gpu/drm/sun4i/sun8i_tcon_top.c | 94 ++++++++++++++------------
> > > 1 file changed, 49 insertions(+), 45 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
> > > index 465e9b0cdfee..a8978b3fe851 100644
> > > --- a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
> > > +++ b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
> > > @@ -124,7 +124,53 @@ static struct clk_hw *sun8i_tcon_top_register_gate(struct device *dev,
> > > static int sun8i_tcon_top_bind(struct device *dev, struct device *master,
> > > void *data)
> > > {
> > > - struct platform_device *pdev = to_platform_device(dev);
> > > + struct sun8i_tcon_top *tcon_top = dev_get_drvdata(dev);
> > > + int ret;
> > > +
> > > + ret = reset_control_deassert(tcon_top->rst);
> > > + if (ret) {
> > > + dev_err(dev, "Could not deassert ctrl reset control\n");
> > > + return ret;
> > > + }
> > > +
> > > + ret = clk_prepare_enable(tcon_top->bus);
> > > + if (ret) {
> > > + dev_err(dev, "Could not enable bus clock\n");
> > > + goto err_assert_reset;
> > > + }
> >
> > You have to de-assert the reset control and enable the clock before the
> > clocks it provides are registered. Otherwise a consumer may come in and
> > ask for the provided clock to be enabled, but since the TCON TOP's own
> > reset and clock are still disabled, you can't actually access the registers
> > that controls the provided clock.
>
> These rst and bus are common reset and bus clocks not tcon top clocks
> that are trying to register here. ie reason I have not moved it in
> top.
And you're sure that toggling bits in the TCON TOP block doesn't require
the reset to be de-asserted and the bus clock enabled?
Somehow I doubt that.
Once the driver register the clocks it provides, they absolutely must work.
They can't only work after the bind phase when the reset gets de-asserted
and the bus clock enabled. Or you should provide proper error reporting
in the clock ops. I doubt you want to go that way either.
ChenYu
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