On Mon, Jun 17, 2019 at 02:51:04PM +0200, Arnd Bergmann wrote:
> clang points out a bug in the clock calculation on 32-bit, that leads
> to the clock_ratio always being zero:
>
> drivers/gpu/drm/arm/display/komeda/komeda_crtc.c:31:36: error: shift count >= width of type [-Werror,-Wshift-count-overflow]
> aclk = komeda_calc_aclk(kcrtc_st) << 32;
>
> Move the shift into the division to make it apply on a 64-bit
> variable. Also use the more expensive div64_u64() instead of div_u64()
> to account for pxlclk being a 64-bit integer.
>
> Fixes: a962091227ed ("drm/komeda: Add engine clock requirement check for the downscaling")
> Signed-off-by: Arnd Bergmann <arnd@xxxxxxxx>
> ---
> drivers/gpu/drm/arm/display/komeda/komeda_crtc.c | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c b/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c
> index cafb4457e187..3f222f464eb2 100644
> --- a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c
> +++ b/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c
> @@ -28,10 +28,9 @@ static void komeda_crtc_update_clock_ratio(struct komeda_crtc_state *kcrtc_st)
> }
>
> pxlclk = kcrtc_st->base.adjusted_mode.clock * 1000;
> - aclk = komeda_calc_aclk(kcrtc_st) << 32;
> + aclk = komeda_calc_aclk(kcrtc_st);
>
> - do_div(aclk, pxlclk);
> - kcrtc_st->clock_ratio = aclk;
> + kcrtc_st->clock_ratio = div64_u64(aclk << 32, pxlclk);
> }
>
> /**
> --
> 2.20.0
Hi Arnd:
Thank you for the patch.
Reviewed-by: James Qian Wang (Arm Technology China) <james.qian.wang@xxxxxxx>
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