Am Samstag, 15. Juni 2019, 00:47:29 CEST schrieb Douglas Anderson: > When fixing up the clock in vop_crtc_mode_fixup() we're not doing it > quite correctly. Specifically if we've got the true clock 266666667 Hz, > we'll perform this calculation: > 266666667 / 1000 => 266666 > > Later when we try to set the clock we'll do clk_set_rate(266666 * > 1000). The common clock framework won't actually pick the proper clock > in this case since it always wants clocks <= the specified one. > > Let's solve this by using DIV_ROUND_UP. > > Fixes: b59b8de31497 ("drm/rockchip: return a true clock rate to adjusted_mode") > Signed-off-by: Douglas Anderson <dianders@xxxxxxxxxxxx> > Signed-off-by: Sean Paul <seanpaul@xxxxxxxxxxxx> > Reviewed-by: Yakir Yang <ykk@xxxxxxxxxxxxxx> I gave both patches a testrun on rk3288, rk3328 and rk3399 and applied them to drm-misc-next thereafter Thanks Heiko _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel