-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 On 15/04/12 11:20, Steven Newbury wrote: > On 14/04/12 21:48, Yinghai Lu wrote: >> On Sat, Apr 14, 2012 at 12:21 PM, Steven Newbury >> <steve@xxxxxxxxxxxxxxx> wrote: >>> -----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 >>> >>> On 14/04/12 20:08, Steven Newbury wrote: >>>> On 14/04/12 19:42, Steven Newbury wrote: >>>>> On 14/04/12 19:05, Steven Newbury wrote: >>>>>> On 14/04/12 18:37, Steven Newbury wrote: >>>>>>> On 12/04/12 17:40, Steven Newbury wrote: >>>>>>>> On Thu, 12 Apr 2012, 17:07:33 BST, Yinghai Lu >>>>>>>> <yinghai@xxxxxxxxxx> wrote: >>>> >>>>>>>>> On Thu, Apr 12, 2012 at 4:22 AM, Steven Newbury >>>>>>>>> <steve@xxxxxxxxxxxxxxx> wrote: >>>>>>>>>> Thanks, that fixed it! :) I had a similar patch >>>>>>>>>> I've been working on but I had my fix in the >>>>>>>>>> wrong place! >>>>>>>>>> >>>>>>>>>> In the working case, initially the BIOS has set >>>>>>>>>> GMA to within the low system DRAM 0xC0000000 >>>>>>>>>> obviously invalid. This conflict is detected and >>>>>>>>>> it's relallocated to 0x12000000. >>>>>>>>>> >>>>>>>>>> I've attempted to modify probe.c to disable >>>>>>>>>> 64-bit BARs not allocated above 4G so they get >>>>>>>>>> reallocated above when possible later. It seemed >>>>>>>>>> to work, but again broke GMA despite the BAR >>>>>>>>>> originally containing an invalid address as >>>>>>>>>> mentioned above, it seems for some reason >>>>>>>>>> something is different when the conflict is >>>>>>>>>> detected and rellocated, compared to disabling >>>>>>>>>> it early then allocating a valid value..? >>>>>>>>>> >>>>>>> I've created a new quirk utilising an extra PCI >>>>>>> resource flag to force reallocation of the resource. >>>>>>> It's the first approach I've had any success at. It >>>>>>> does work. Only "Intel Page Flush" now gets allocated >>>>>>> @0xe0000000! >>>> >>>> >>>>>> Hopefully this should fix "Intel Flush Page" >>>>> Need to export pci_bus_alloc_resource_fit for intel-gtt. >>>> Nearly worked... Or at least it should have worked, but for >>>> some reason the allocator failed to utilise >>>> 0xe0000000-0xefffffff for 04:00.0 BAR0..? >>>> >>>> >>>> pci 0000:03:08.0: BAR 15: can't assign mem pref (size >>>> 0x18000000) >>> Ah! Not enough space for the bridge window!:( >>> > >> please append pci=norom ... > > That worked. Except of course the radeon driver can't POST the > card without the ROM! :-P Can the ROM resource be mapped above 4G? -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.19 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org/ iEYEARECAAYFAk+KsxIACgkQGcb56gMuC63JTQCeOK9EGuyoWPe8lsSS5Y6QcfPi 9HQAniZQP84biGVRM4bP8R6/ulGjuRWV =i8py -----END PGP SIGNATURE----- _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/dri-devel
