Current komeda driver uses three dedicated clks for a specific purpose:
- mclk: main engine clock
- pclk: APB clock
- pipeline->aclk: AXI clock.
But per spec the komeda HW only has three input clks:
- ACLK: used for AXI masters, APB slave and most pipeline processing
- PXCLK for pipeline 0: output pixel clock for pipeline 0
- PXCLK for pipeline 1: output pixel clock for pipeline 1
So one ACLK is enough, no need to split it to three mclk/pclk/axiclk.
drop pclk/pipeline->axiclk. but only keep one mclk in komeda driver.
Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@xxxxxxx>
---
.../gpu/drm/arm/display/komeda/komeda_crtc.c | 11 -------
.../gpu/drm/arm/display/komeda/komeda_dev.c | 33 ++++---------------
.../gpu/drm/arm/display/komeda/komeda_dev.h | 2 --
.../drm/arm/display/komeda/komeda_pipeline.c | 1 -
.../drm/arm/display/komeda/komeda_pipeline.h | 2 --
5 files changed, 7 insertions(+), 42 deletions(-)
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c b/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c
index b5190a1f75eb..3933f4377cc1 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c
@@ -127,9 +127,6 @@ komeda_crtc_prepare(struct komeda_crtc *kcrtc)
DRM_ERROR("failed to enable mclk.\n");
}
- err = clk_prepare_enable(master->aclk);
- if (err)
- DRM_ERROR("failed to enable axi clk for pipe%d.\n", master->id);
err = clk_set_rate(master->pxlclk, pxlclk_rate);
if (err)
DRM_ERROR("failed to set pxlclk for pipe%d\n", master->id);
@@ -170,7 +167,6 @@ komeda_crtc_unprepare(struct komeda_crtc *kcrtc)
mdev->dpmode = new_mode;
clk_disable_unprepare(master->pxlclk);
- clk_disable_unprepare(master->aclk);
if (new_mode == KOMEDA_MODE_INACTIVE)
clk_disable_unprepare(mdev->mclk);
@@ -374,13 +370,6 @@ komeda_crtc_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *m)
return MODE_CLOCK_HIGH;
}
- if (clk_round_rate(master->aclk, mode_clk) < pxlclk) {
- DRM_DEBUG_ATOMIC("aclk can't satisfy the requirement of %s-clk: %ld.\n",
- m->name, pxlclk);
-
- return MODE_CLOCK_HIGH;
- }
-
return MODE_OK;
}
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_dev.c b/drivers/gpu/drm/arm/display/komeda/komeda_dev.c
index 485d8bd12e39..f8f6edbf6f0d 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_dev.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_dev.c
@@ -115,13 +115,6 @@ static int komeda_parse_pipe_dt(struct komeda_dev *mdev, struct device_node *np)
pipe = mdev->pipelines[pipe_id];
- clk = of_clk_get_by_name(np, "aclk");
- if (IS_ERR(clk)) {
- DRM_ERROR("get aclk for pipeline %d failed!\n", pipe_id);
- return PTR_ERR(clk);
- }
- pipe->aclk = clk;
-
clk = of_clk_get_by_name(np, "pxclk");
if (IS_ERR(clk)) {
DRM_ERROR("get pxclk for pipeline %d failed!\n", pipe_id);
@@ -144,14 +137,8 @@ static int komeda_parse_dt(struct device *dev, struct komeda_dev *mdev)
{
struct platform_device *pdev = to_platform_device(dev);
struct device_node *child, *np = dev->of_node;
- struct clk *clk;
int ret;
- clk = devm_clk_get(dev, "mclk");
- if (IS_ERR(clk))
- return PTR_ERR(clk);
-
- mdev->mclk = clk;
mdev->irq = platform_get_irq(pdev, 0);
if (mdev->irq < 0) {
DRM_ERROR("could not get IRQ number.\n");
@@ -205,16 +192,15 @@ struct komeda_dev *komeda_dev_create(struct device *dev)
goto err_cleanup;
}
- mdev->pclk = devm_clk_get(dev, "pclk");
- if (IS_ERR(mdev->pclk)) {
- DRM_ERROR("Get APB clk failed.\n");
- err = PTR_ERR(mdev->pclk);
- mdev->pclk = NULL;
+ mdev->mclk = devm_clk_get(dev, "mclk");
+ if (IS_ERR(mdev->mclk)) {
+ DRM_ERROR("Get engine clk failed.\n");
+ err = PTR_ERR(mdev->mclk);
+ mdev->mclk = NULL;
goto err_cleanup;
}
- /* Enable APB clock to access the registers */
- clk_prepare_enable(mdev->pclk);
+ clk_prepare_enable(mdev->mclk);
mdev->funcs = product->identify(mdev->reg_base, &mdev->chip);
if (!komeda_product_match(mdev, product->product_id)) {
@@ -315,15 +301,10 @@ void komeda_dev_destroy(struct komeda_dev *mdev)
}
if (mdev->mclk) {
+ clk_disable_unprepare(mdev->mclk);
devm_clk_put(dev, mdev->mclk);
mdev->mclk = NULL;
}
- if (mdev->pclk) {
- clk_disable_unprepare(mdev->pclk);
- devm_clk_put(dev, mdev->pclk);
- mdev->pclk = NULL;
- }
-
devm_kfree(dev, mdev);
}
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_dev.h b/drivers/gpu/drm/arm/display/komeda/komeda_dev.h
index 5126879d597e..5feaed2dc93f 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_dev.h
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_dev.h
@@ -160,8 +160,6 @@ struct komeda_dev {
struct komeda_chip_info chip;
/** @fmt_tbl: initialized by &komeda_dev_funcs->init_format_table */
struct komeda_format_caps_table fmt_tbl;
- /** @pclk: APB clock for register access */
- struct clk *pclk;
/** @mclk: HW main engine clk */
struct clk *mclk;
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c
index 0bb443b336f7..78e44d9e1520 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c
@@ -53,7 +53,6 @@ void komeda_pipeline_destroy(struct komeda_dev *mdev,
}
clk_put(pipe->pxlclk);
- clk_put(pipe->aclk);
of_node_put(pipe->of_output_dev);
of_node_put(pipe->of_output_port);
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h
index 0c3f101e0dce..090a5d92d5f1 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h
@@ -388,8 +388,6 @@ struct komeda_pipeline {
struct komeda_dev *mdev;
/** @pxlclk: pixel clock */
struct clk *pxlclk;
- /** @aclk: AXI clock */
- struct clk *aclk;
/** @id: pipeline id */
int id;
/** @avail_comps: available components mask of pipeline */
--
2.17.1
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