On Fri, May 24, 2019 at 2:04 AM Maxime Ripard <maxime.ripard@xxxxxxxxxxx> wrote: > > On Mon, May 20, 2019 at 02:33:08PM +0530, Jagan Teki wrote: > > According to "DRM kernel-internal display mode structure" in > > include/drm/drm_modes.h the current driver is trying to include > > sync timings along with front porch value while checking and > > computing drq set bits in non-burst mode. > > > > mode->hsync_end - mode->hdisplay => horizontal front porch + sync > > > > With adding additional sync timings, the dsi controller leads to > > wrong drq set bits for "bananapi,s070wv20-ct16" panel which indeed > > trigger panel flip_done timed out as: > > > > WARNING: CPU: 0 PID: 31 at drivers/gpu/drm/drm_atomic_helper.c:1429 drm_atomic_helper_wait_for_vblanks.part.1+0x298/0x2a0 > > [CRTC:46:crtc-0] vblank wait timed out > > Modules linked in: > > CPU: 0 PID: 31 Comm: kworker/0:1 Not tainted 5.1.0-next-20190514-00026-g01f0c75b902d-dirty #13 > > Hardware name: Allwinner sun8i Family > > Workqueue: events deferred_probe_work_func > > [<c010ed54>] (unwind_backtrace) from [<c010b76c>] (show_stack+0x10/0x14) > > [<c010b76c>] (show_stack) from [<c0688c70>] (dump_stack+0x84/0x98) > > [<c0688c70>] (dump_stack) from [<c011d9e4>] (__warn+0xfc/0x114) > > [<c011d9e4>] (__warn) from [<c011da40>] (warn_slowpath_fmt+0x44/0x68) > > [<c011da40>] (warn_slowpath_fmt) from [<c040cd50>] (drm_atomic_helper_wait_for_vblanks.part.1+0x298/0x2a0) > > [<c040cd50>] (drm_atomic_helper_wait_for_vblanks.part.1) from [<c040e694>] (drm_atomic_helper_commit_tail_rpm+0x5c/0x6c) > > [<c040e694>] (drm_atomic_helper_commit_tail_rpm) from [<c040e4dc>] (commit_tail+0x40/0x6c) > > [<c040e4dc>] (commit_tail) from [<c040e5cc>] (drm_atomic_helper_commit+0xbc/0x128) > > [<c040e5cc>] (drm_atomic_helper_commit) from [<c0411b64>] (restore_fbdev_mode_atomic+0x1cc/0x1dc) > > [<c0411b64>] (restore_fbdev_mode_atomic) from [<c04156f8>] (drm_fb_helper_restore_fbdev_mode_unlocked+0x54/0xa0) > > [<c04156f8>] (drm_fb_helper_restore_fbdev_mode_unlocked) from [<c0415774>] (drm_fb_helper_set_par+0x30/0x54) > > [<c0415774>] (drm_fb_helper_set_par) from [<c03ad450>] (fbcon_init+0x560/0x5ac) > > [<c03ad450>] (fbcon_init) from [<c03eb8a0>] (visual_init+0xbc/0x104) > > [<c03eb8a0>] (visual_init) from [<c03ed1b8>] (do_bind_con_driver+0x1b0/0x390) > > [<c03ed1b8>] (do_bind_con_driver) from [<c03ed780>] (do_take_over_console+0x13c/0x1c4) > > [<c03ed780>] (do_take_over_console) from [<c03ad800>] (do_fbcon_takeover+0x74/0xcc) > > [<c03ad800>] (do_fbcon_takeover) from [<c013c9c8>] (notifier_call_chain+0x44/0x84) > > [<c013c9c8>] (notifier_call_chain) from [<c013cd20>] (__blocking_notifier_call_chain+0x48/0x60) > > [<c013cd20>] (__blocking_notifier_call_chain) from [<c013cd50>] (blocking_notifier_call_chain+0x18/0x20) > > [<c013cd50>] (blocking_notifier_call_chain) from [<c03a6e44>] (register_framebuffer+0x1e0/0x2f8) > > [<c03a6e44>] (register_framebuffer) from [<c04153c0>] (__drm_fb_helper_initial_config_and_unlock+0x2fc/0x50c) > > [<c04153c0>] (__drm_fb_helper_initial_config_and_unlock) from [<c04158c8>] (drm_fbdev_client_hotplug+0xe8/0x1b8) > > [<c04158c8>] (drm_fbdev_client_hotplug) from [<c0415a20>] (drm_fbdev_generic_setup+0x88/0x118) > > [<c0415a20>] (drm_fbdev_generic_setup) from [<c043f060>] (sun4i_drv_bind+0x128/0x160) > > [<c043f060>] (sun4i_drv_bind) from [<c044b598>] (try_to_bring_up_master+0x164/0x1a0) > > [<c044b598>] (try_to_bring_up_master) from [<c044b668>] (__component_add+0x94/0x140) > > [<c044b668>] (__component_add) from [<c0445e1c>] (sun6i_dsi_probe+0x144/0x234) > > [<c0445e1c>] (sun6i_dsi_probe) from [<c0452ef4>] (platform_drv_probe+0x48/0x9c) > > [<c0452ef4>] (platform_drv_probe) from [<c04512cc>] (really_probe+0x1dc/0x2c8) > > [<c04512cc>] (really_probe) from [<c0451518>] (driver_probe_device+0x60/0x160) > > [<c0451518>] (driver_probe_device) from [<c044f7a4>] (bus_for_each_drv+0x74/0xb8) > > [<c044f7a4>] (bus_for_each_drv) from [<c045107c>] (__device_attach+0xd0/0x13c) > > [<c045107c>] (__device_attach) from [<c0450474>] (bus_probe_device+0x84/0x8c) > > [<c0450474>] (bus_probe_device) from [<c0450900>] (deferred_probe_work_func+0x64/0x90) > > [<c0450900>] (deferred_probe_work_func) from [<c0135970>] (process_one_work+0x204/0x420) > > [<c0135970>] (process_one_work) from [<c013690c>] (worker_thread+0x274/0x5a0) > > [<c013690c>] (worker_thread) from [<c013b3d8>] (kthread+0x11c/0x14c) > > [<c013b3d8>] (kthread) from [<c01010e8>] (ret_from_fork+0x14/0x2c) > > Exception stack(0xde539fb0 to 0xde539ff8) > > 9fa0: 00000000 00000000 00000000 00000000 > > 9fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 > > 9fe0: 00000000 00000000 00000000 00000000 00000013 00000000 > > ---[ end trace b57eb1e5c64c6b8b ]--- > > random: fast init done > > [drm:drm_atomic_helper_wait_for_dependencies] *ERROR* [CRTC:46:crtc-0] flip_done timed out > > [drm:drm_atomic_helper_wait_for_dependencies] *ERROR* [CONNECTOR:48:DSI-1] flip_done timed out > > [drm:drm_atomic_helper_wait_for_dependencies] *ERROR* [PLANE:30:plane-0] flip_done timed out > > > > But according to Allwinner A33, A64 BSP code [1] [3] the TCON DRQ for > > non-burst DSI mode can be computed based on "horizontal front porch" > > value only (no sync timings included). > > > > Detailed evidence for drq set bits based on A33 BSP [1] [2] > > > > => panel->lcd_ht - panel->lcd_x - panel->lcd_hbp - 20 > > => (tt->hor_front_porch + lcdp->panel_info.lcd_hbp + > > lcdp->panel_info.lcd_x) - panel->lcd_x - panel->lcd_hbp - 20 > > => tt->hor_front_porch - 20 > > The thing is, while your explanation on the DRM side is sound, > Allwinner has been using the hbp field of their panel description to > store what DRM calls the backporch and the sync period. Exactly, hbp = backporch + sync https://github.com/BPI-SINOVOIP/BPI-M2M-bsp/blob/master/linux-sunxi/drivers/video/sunxi/disp/de/disp_lcd.c#L2046 And the above computation is rely on that as well. If you can see the final out of the above computation you can get the front porch value (w/o sync ) > > And nowhere in that commit log you are describing whether it's still > an issue or not, and if it's not anymore how you did test that it's > not the case anymore. No, I have explained 1st and 2nd para about 00. There is any additional sync timings in the drq set bits 01: issue occur due to adding addition sync timings with longs on the panel, by referring 03: and later paragraphs proved that there is no sync timings used in BSP Am I missing anythings? _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
