On Fri, 17 May 2019 09:27:38 +0200 Maxime Ripard <maxime.ripard@xxxxxxxxxxx> wrote: > On Thu, May 16, 2019 at 06:48:59PM +0200, Torsten Duwe wrote: > > On Thu, May 16, 2019 at 09:06:41AM -0700, Vasily Khoruzhick wrote: > > > > > > Driver can talk to the panel over AUX channel only after t1+t3, > > > t1 is up to 10ms, t3 is up to 200ms. > > > > This is after power-on. The boot loader needs to deal with this. > > The bootloader can deal with it, but the kernel will also need to. The > bootloader might not be doing this because it's not been updated, the > regulator might have been disabled between the time the kernel was > started and the time the bridge driver probes, etc. No, you cannot practically switch off this voltage. It supports _all_ the devices I mentioned. In fact, the PMIC needs to enable it initially, and then it takes some time before the SoC can access the MMC and read the SPL from it, just because of exactly these 3.3V. Then the boot loader starts, and later the eDP bridge gets initialised. In *theory*, albeit a very daring one, I could imagine a very deep sleep mode that can only be ended by pressing the power button, which should still work without DCDC1. Only then, a description of the panel would be required. But I probably missed something and even this does not work. So for all current practical purposes, we can assume the Teres-I panel to be powered properly and providing valid EDID; nothing to worry about in software. HTH, Torsten _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
