Dear Philippe,
you're right, clk_disable() & clk_enable() are necessary with STM32F4
SOC (not for STM32MP1).
I'll revert this part of the patch.
Many thanks
--
Yannick Fertré | TINA: 166 7152 | Tel: +33 244027152 | Mobile: +33 620600270
Microcontrollers and Digital ICs Group | Microcontrolleurs Division
On 5/10/19 6:40 PM, Philippe CORNU wrote:
> Dear Yannick,
> Thank you for your patch,
>
> In your patch, you have removed clk_disable() & clk_enable().
> Could you please double confirm ?
>
> thanks
> Philippe :-)
>
>
> On 5/10/19 5:03 PM, Yannick Fertré wrote:
>> Clk_round_rate returns rounded clock without changing
>> the hardware in any way.
>> This function couldn't replace set_rate/get_rate calls.
>> Todo comment has been removed & a new log inserted.
>>
>> Signed-off-by: Yannick Fertré <yannick.fertre@xxxxxx>
>> ---
>> drivers/gpu/drm/stm/ltdc.c | 10 +++-------
>> 1 file changed, 3 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c
>> index 97912e2..2f8aa2e 100644
>> --- a/drivers/gpu/drm/stm/ltdc.c
>> +++ b/drivers/gpu/drm/stm/ltdc.c
>> @@ -507,20 +507,16 @@ static bool ltdc_crtc_mode_fixup(struct drm_crtc *crtc,
>> struct ltdc_device *ldev = crtc_to_ltdc(crtc);
>> int rate = mode->clock * 1000;
>>
>> - /*
>> - * TODO clk_round_rate() does not work yet. When ready, it can
>> - * be used instead of clk_set_rate() then clk_get_rate().
>> - */
>> -
>> - clk_disable(ldev->pixel_clk);
>> if (clk_set_rate(ldev->pixel_clk, rate) < 0) {
>> DRM_ERROR("Cannot set rate (%dHz) for pixel clk\n", rate);
>> return false;
>> }
>> - clk_enable(ldev->pixel_clk);
>>
>> adjusted_mode->clock = clk_get_rate(ldev->pixel_clk) / 1000;
>>
>> + DRM_DEBUG_DRIVER("requested clock %dkHz, adjusted clock %dkHz\n",
>> + mode->clock, adjusted_mode->clock);
>> +
>> return true;
>> }
>>
--
Yannick Fertré | TINA: 166 7152 | Tel: +33 244027152 | Mobile: +33 620600270
Microcontrollers and Digital ICs Group | Microcontrolleurs Division
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