[Bug 109607] [CI][DRMTIP] Time is passing at a different rate between IGT machines and the controller

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Comment # 12 on bug 109607 from
This is an infrastructure deficiency coming from technical limitations. It is
especially bad as it requires us to create a catch-all bug for incompletes,
that may obscure some serious problems.

To mitigate that we look at all the failures under this bug periodically, and
if we see anything that looks suspicious we file it separately.

This generates manual labor and increases latency in detecting new issues
causing incomplete.

This is important to fix from CI infrastructure point of view.


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