24.01.2019 21:02, Thierry Reding пишет: > From: Thierry Reding <treding@xxxxxxxxxx> > > Tegra186 and later are different from earlier generations in that they > use an ARM SMMU rather than the Tegra SMMU. The ARM SMMU driver behaves > slightly differently in that the geometry for IOMMU domains is set only > after a device was attached to it. This is to make sure that the SMMU > instance that the domain belongs to is known, because each instance can > have a different input address space (i.e. geometry). > > Work around this by moving all IOVA allocations to a point where the > geometry of the domain is properly initialized. > > This second version of the series addresses all review comments and adds > a number of patches that will actually allow host1x to work with an SMMU > enabled on Tegra186. The patches also add programming required to > address the full 40 bits of address space. > > This supersedes the following patch: > > https://patchwork.kernel.org/patch/10775579/ Secondly, seems there are additional restrictions for the host1x jobs on T186, at least T186 TRM suggests so. In particular looks like each client is hardwired to a specific sync point and to a specific channel. Or maybe there is assumption that upstream kernel could work only in a hypervisor mode or with all protections disable. Could you please clarify? _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
