The interconnect API provides an interface for consumer drivers to express
their bandwidth needs in the SoC. This data is aggregated and the on-chip
interconnect hardware is configured to the appropriate power/performance
profile.
MDSS is one of the interconnect consumers which uses the interconnect APIs
to get the path between endpoints and set its bandwidth requirements
for the given interconnected path.
Subsequently, there is a clean up patch to remove all the references
of the DPU custom bus scaling.
There is corresponding DT patch with the source and destination ports
defined for display driver which will be sent separately.
Changes in v2:
- Remove error log and unnecessary check (Jordan Crouse)
- Fixed build error due to partial clean up
Changes in v3:
- Remove common property definitions (Rob Herring)
- Code clean up involving variable name change, removal
of extra paranthesis and variables (Matthias Kaehlcke)
- Condense multiple lines into a single line (Sean Paul)
Changes in v4:
- Add comments, spacings, tabs, proper port name and icc macro
- Use port macros and change port string names (Georgi Djakov)
Changes in v5:
- Updated commit text and parenthesis alignment (Georgi Djakov)
Changes in v6:
- Change icc_set to icc_set_bw (Doug Anderson)
Changes in v7:
- Fixed a typo
Jayant Shekhar (3):
drm/msm/dpu: clean up references of DPU custom bus scaling
drm/msm/dpu: Integrate interconnect API in MDSS
dt-bindings: msm/disp: Introduce interconnect bindings for MDSS on
SDM845
.../devicetree/bindings/display/msm/dpu.txt | 10 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 174 ++++++++-------------
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h | 4 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 13 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c | 49 +++++-
drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c | 47 ++----
drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h | 68 --------
drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h | 22 +--
8 files changed, 144 insertions(+), 243 deletions(-)
--
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