On Tue, Dec 18, 2018 at 04:37:40PM +0100, Lubomir Rintel wrote:
> It needs to be enabled (at least on MMP2) in order for the register
> writes to LCDC to work.
Dove also has an AXI clock input to the LCDC, but it isn't clear
whether that is necessary for register access or not. From a quick
search of the documentation, there doesn't appear to be an enable bit
for the AXI clock. Unfortunately, the documentation of clocks on Dove
is not very good.
However, Dove LCDCs can have four clock inputs for the pixel clock -
AXI, PLL and two external clock inputs. It isn't clear what this AXI
clock is, and whether it's the same clock used for register access.
Can you check whether the AXI clock used for the pixel clock is the
same as the AXI bus clock for MMP2 and document that please?
Thanks.
>
> Signed-off-by: Lubomir Rintel <lkundrak@xxxxx>
> ---
> drivers/gpu/drm/armada/armada_crtc.c | 7 +++++++
> drivers/gpu/drm/armada/armada_crtc.h | 1 +
> 2 files changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/armada/armada_crtc.c b/drivers/gpu/drm/armada/armada_crtc.c
> index 5400fb925bcd..973c377975a1 100644
> --- a/drivers/gpu/drm/armada/armada_crtc.c
> +++ b/drivers/gpu/drm/armada/armada_crtc.c
> @@ -679,6 +679,7 @@ static void armada_drm_crtc_destroy(struct drm_crtc *crtc)
>
> of_node_put(dcrtc->crtc.port);
>
> + clk_disable_unprepare(dcrtc->axiclk);
> kfree(dcrtc);
> }
>
> @@ -748,6 +749,11 @@ static int armada_drm_crtc_create(struct drm_device *drm, struct device *dev,
> dcrtc->clk = ERR_PTR(-EINVAL);
> dcrtc->spu_iopad_ctrl = CFG_VSCALE_LN_EN | CFG_IOPAD_DUMB24;
>
> + dcrtc->axiclk = devm_clk_get(dev, "axiclk");
> + if (IS_ERR(dcrtc->axiclk))
> + dcrtc->axiclk = NULL;
> + WARN_ON(clk_prepare_enable(dcrtc->axiclk));
> +
> endpoint = of_get_next_child(port, NULL);
> of_property_read_u32(endpoint, "bus-width", &bus_width);
> of_node_put(endpoint);
> @@ -829,6 +835,7 @@ static int armada_drm_crtc_create(struct drm_device *drm, struct device *dev,
> err_crtc_init:
> primary->funcs->destroy(primary);
> err_crtc:
> + clk_disable_unprepare(dcrtc->axiclk);
> kfree(dcrtc);
>
> return ret;
> diff --git a/drivers/gpu/drm/armada/armada_crtc.h b/drivers/gpu/drm/armada/armada_crtc.h
> index 7ebd337b60af..b07faea7257d 100644
> --- a/drivers/gpu/drm/armada/armada_crtc.h
> +++ b/drivers/gpu/drm/armada/armada_crtc.h
> @@ -39,6 +39,7 @@ struct armada_crtc {
> const struct armada_variant *variant;
> unsigned num;
> void __iomem *base;
> + struct clk *axiclk;
> struct clk *clk;
> struct clk *extclk[2];
> struct {
> --
> 2.19.1
>
--
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