Should be fixed already with an updated -fixes.
Regards, Joonas
Quoting kbuild test robot (2018-12-12 10:31:58)
> tree: git://anongit.freedesktop.org/drm-intel for-linux-next-fixes
> head: eeb139ca4b24d515265ad75f668333431896b1aa
> commit: eeb139ca4b24d515265ad75f668333431896b1aa [5/5] drm/i915: Flush GPU relocs harder for gen3
> config: i386-randconfig-x073-201849 (attached as .config)
> compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
> reproduce:
> git checkout eeb139ca4b24d515265ad75f668333431896b1aa
> # save the attached .config to linux build tree
> make ARCH=i386
>
> All errors (new ones prefixed by >>):
>
> drivers/gpu//drm/i915/intel_ringbuffer.c: In function 'gen2_render_ring_flush':
> >> drivers/gpu//drm/i915/intel_ringbuffer.c:89:11: error: implicit declaration of function 'i915_scratch_offset'; did you mean 'i915_ggtt_offset'? [-Werror=implicit-function-declaration]
> *cs++ = i915_scratch_offset(rq->i915);
> ^~~~~~~~~~~~~~~~~~~
> i915_ggtt_offset
> cc1: some warnings being treated as errors
>
> vim +89 drivers/gpu//drm/i915/intel_ringbuffer.c
>
> 68
> 69 static int
> 70 gen2_render_ring_flush(struct i915_request *rq, u32 mode)
> 71 {
> 72 unsigned int num_store_dw;
> 73 u32 cmd, *cs;
> 74
> 75 cmd = MI_FLUSH;
> 76 num_store_dw = 0;
> 77 if (mode & EMIT_INVALIDATE)
> 78 cmd |= MI_READ_FLUSH;
> 79 if (mode & EMIT_FLUSH)
> 80 num_store_dw = 4;
> 81
> 82 cs = intel_ring_begin(rq, 2 + 3 * num_store_dw);
> 83 if (IS_ERR(cs))
> 84 return PTR_ERR(cs);
> 85
> 86 *cs++ = cmd;
> 87 while (num_store_dw--) {
> 88 *cs++ = MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL;
> > 89 *cs++ = i915_scratch_offset(rq->i915);
> 90 *cs++ = 0;
> 91 }
> 92 *cs++ = MI_FLUSH | MI_NO_WRITE_FLUSH;
> 93
> 94 intel_ring_advance(rq, cs);
> 95
> 96 return 0;
> 97 }
> 98
>
> ---
> 0-DAY kernel test infrastructure Open Source Technology Center
> https://lists.01.org/pipermail/kbuild-all Intel Corporation
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