Hi Dave, last i915 changes for -next.
drm-intel-next-2018-12-04:
Final drm/i915 changes for v4.21:
- ICL DSI video mode enabling (Madhav, Vandita, Jani, Imre)
- eDP sink count fix (José)
- PSR fixes (José)
- DRM DP helper and i915 DSC enabling (Manasi, Gaurav, Anusha)
- DP FEC enabling (Anusha)
- SKL+ watermark/ddb programming improvements (Ville)
- Pixel format fixes (Ville)
- Selftest updates (Chris, Tvrtko)
- GT and engine workaround improvements (Tvrtko)
BR,
Jani.
The following changes since commit b4bf44d2dcbd6c35d9651bc6286e4940b8b3df95:
drm/i915: Update DRIVER_DATE to 20181122 (2018-11-22 16:49:47 +0200)
are available in the git repository at:
git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-next-2018-12-04
for you to fetch changes up to 4377d4e0d3d511986033ba7b4182d5a80b7f9ea2:
drm/i915: Update DRIVER_DATE to 20181204 (2018-12-04 19:26:17 +0200)
----------------------------------------------------------------
Final drm/i915 changes for v4.21:
- ICL DSI video mode enabling (Madhav, Vandita, Jani, Imre)
- eDP sink count fix (José)
- PSR fixes (José)
- DRM DP helper and i915 DSC enabling (Manasi, Gaurav, Anusha)
- DP FEC enabling (Anusha)
- SKL+ watermark/ddb programming improvements (Ville)
- Pixel format fixes (Ville)
- Selftest updates (Chris, Tvrtko)
- GT and engine workaround improvements (Tvrtko)
----------------------------------------------------------------
Anusha Srivatsa (4):
i915/dp/fec: Add fec_enable to the crtc state.
drm/i915/fec: Set FEC_READY in FEC_CONFIGURATION
i915/dp/fec: Configure the Forward Error Correction bits.
drm/i915/fec: Disable FEC state.
Chris Wilson (12):
drm/i915: Cache the error string
drm/i915/ringbuffer: 2-step restart
drm/i915: Skip engine serialisation for no-op seqno reset
drm/i915: Mark up early pre-production Kabylakes
drm/i915: Fixup stub definitions for intel_opregion_suspend|resume
drm/i915/ringbuffer: Clear semaphore sync registers on ring init
drm/i915/selftests: Terminate hangcheck sanitycheck forcibly
drm/i915/breadcrumbs: Reduce missed-breadcrumb false positive rate
drm/i915/vgpu: Disallow loading on old vGPU hosts
drm/i915/dp: Fix inconsistent indenting
drm/i915: Complete the fences as they are cancelled due to wedging
drm/i915: Allocate a common scratch page
Gaurav K Singh (3):
drm/i915/dsc: Define & Compute VESA DSC params
drm/i915/dsc: Compute Rate Control parameters for DSC
drm/i915/dp: Enable/Disable DSC in DP Sink
Imre Deak (1):
drm/i915/icl: Sanitize DDI port clock gating for DSI ports
Jani Nikula (7):
drm/i915/icl: push pll to port mapping/unmapping to ddi encoder hooks
drm/i915/icl: add dummy DSI GPIO element execution function
drm/i915/icl: add pll mapping for DSI
sysfs: constify sysfs create/remove files harder
drm/i915/sysfs: make attrs arrays const
drm/i915/icl: fix transcoder state readout
drm/i915: Update DRIVER_DATE to 20181204
Jonathan Gray (1):
drm/i915: change i915_sw_fence license to MIT
José Roberto de Souza (9):
drm/i915: Avoid a full port detection in the first eDP short pulse
drm/i915: Check PSR errors instead of retrain while PSR is enabled
drm/i915: Do not enable PSR in the next modeset after a error
drm/i915: Disable PSR when a PSR aux error happen
drm/i915: Keep PSR disabled after a driver reload after a PSR error
drm/i915/hsw: Drop the stereo 3D enabled check in psr_compute_config()
drm/i915/psr: Get pipe id following atomic guidelines
drm/i915: Add HAS_DISPLAY() and use it
drm/i915: Move display device info capabilities to its own struct
Lyude Paul (1):
drm/i915: Synchronize hpd work in i915_hpd_storm_ctl_show()
Madhav Chauhan (14):
drm/i915/icl: Calculate DPLL params for DSI
drm/i915/icl: Allocate DSI encoder/connector
drm/i915/icl: Fill DSI ports info
drm/i915/icl: Allocate DSI hosts and imlement host transfer
drm/i915/icl: Get HW state for DSI encoder
drm/i915/icl: Add DSI encoder compute config hook
drm/i915/icl: Configure DSI Dual link mode
drm/i915/icl: Consider DSI for getting transcoder state
drm/i915/icl: Get pipe timings for DSI
drm/i915/icl: Define missing bitfield for shortplug reg
drm/i915/icl: Define Panel power ctrl register
drm/i915/icl: Define display GPIO pins for DSI
drm/i915/icl: Gate clocks for DSI
drm/i915/icl: Ungate DSI clocks
Manasi Navare (16):
drm/dsc: Modify DRM helper to return complete DSC color depth capabilities
drm/dsc: Define Display Stream Compression PPS infoframe
drm/dsc: Define VESA Display Stream Compression Capabilities
drm/dsc: Add helpers for DSC picture parameter set infoframes
drm/dsc: Define the DSC 1.1 and 1.2 Line Buffer depth constants
drm/i915/dp: Add DSC params and DSC config to intel_crtc_state
drm/i915/dp: Compute DSC pipe config in atomic check
drm/i915/dp: Do not enable PSR2 if DSC is enabled
drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI
drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling
drm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPs
drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes
drm/i915/dp: Configure Display stream splitter registers during DSC enable
drm/i915/dp: Disable DSC in source by disabling DSS CTL bits
drm/i915/dsc: Enable and disable appropriate power wells for VDSC
drm/i915/dp: Fix link compute m_n calc for DSC
Srivatsa, Anusha (1):
drm/dsc: Define Rate Control values that do not change over configurations
Tvrtko Ursulin (11):
drm/i915: Remove whitelist application from ringbuffer backend
drm/i915/icl: Remove Wa_1604302699
drm/i915/selftests: Extract spinner code
drm/i915/selftests: Fix live_workarounds to actually do resets
drm/i915: Record GT workarounds in a list
drm/i915: Introduce per-engine workarounds
drm/i915: Verify GT workaround state after GPU init
drm/i915/selftests: Add tests for GT and engine workaround verification
drm/i915: Move register white-listing to the common workaround framework
drm/i915: Fuse per-context workaround handling with the common framework
drm/i915: Trim unused workaround list entries
Vandita Kulkarni (2):
drm/i915/icl: Use the same pll functions for dsi
drm/i915/icl: Add get config functionality for DSI
Ville Syrjälä (16):
drm/i915: Eliminate the horrendous format check code
drm/i915: Reorganize plane register writes to make them more atomic
drm/i915: Move single buffered plane register writes to the end
drm/i915: Introduce crtc_state->update_planes bitmask
drm/i915: Pass the new crtc_state to ->disable_plane()
drm/i915: Fix latency==0 handling for level 0 watermark on skl+
drm/i915: Remove some useless zeroing on skl+ wm calculations
drm/i915: Pass the entire skl_plane_wm to skl_compute_transition_wm()
drm/i915: Clean up skl+ vs. icl+ watermark computation
drm/i915: Don't pass dev_priv around so much
drm/i915: Move ddb/wm programming into plane update/disable hooks on skl+
drm/i915: Commit skl+ planes in an order that avoids ddb overlaps
drm/i915: Rename the confusing 'plane_id' to 'color_plane'
drm/i915: Pass the plane to icl_program_input_csc_coeff()
drm/i915: Make sure fb gtt offsets stay within 32bits
drm/i915: Decouple SKL stride units from intel_fb_stride_alignment()
Documentation/gpu/drm-kms-helpers.rst | 12 +
drivers/gpu/drm/Makefile | 2 +-
drivers/gpu/drm/drm_dp_helper.c | 14 +-
drivers/gpu/drm/drm_dsc.c | 228 ++++
drivers/gpu/drm/i915/Makefile | 7 +-
drivers/gpu/drm/i915/i915_debugfs.c | 68 +-
drivers/gpu/drm/i915/i915_drv.c | 27 +-
drivers/gpu/drm/i915/i915_drv.h | 62 +-
drivers/gpu/drm/i915/i915_gem.c | 111 +-
drivers/gpu/drm/i915/i915_gem_context.c | 6 +-
drivers/gpu/drm/i915/i915_gpu_error.c | 337 +++---
drivers/gpu/drm/i915/i915_gpu_error.h | 28 +-
drivers/gpu/drm/i915/i915_pci.c | 117 ++-
drivers/gpu/drm/i915/i915_reg.h | 15 +
drivers/gpu/drm/i915/i915_request.c | 3 +
drivers/gpu/drm/i915/i915_sw_fence.c | 7 +-
drivers/gpu/drm/i915/i915_sw_fence.h | 5 +-
drivers/gpu/drm/i915/i915_sysfs.c | 31 +-
drivers/gpu/drm/i915/i915_utils.h | 11 +-
drivers/gpu/drm/i915/icl_dsi.c | 493 ++++++++-
drivers/gpu/drm/i915/intel_atomic.c | 1 +
drivers/gpu/drm/i915/intel_atomic_plane.c | 102 +-
drivers/gpu/drm/i915/intel_bios.c | 2 +-
drivers/gpu/drm/i915/intel_breadcrumbs.c | 6 +-
drivers/gpu/drm/i915/intel_ddi.c | 228 ++--
drivers/gpu/drm/i915/intel_device_info.c | 8 +-
drivers/gpu/drm/i915/intel_device_info.h | 32 +-
drivers/gpu/drm/i915/intel_display.c | 330 +++---
drivers/gpu/drm/i915/intel_display.h | 21 +-
drivers/gpu/drm/i915/intel_dp.c | 303 +++++-
drivers/gpu/drm/i915/intel_dpll_mgr.c | 3 +-
drivers/gpu/drm/i915/intel_drv.h | 52 +-
drivers/gpu/drm/i915/intel_dsi.h | 5 +
drivers/gpu/drm/i915/intel_dsi_vbt.c | 22 +-
drivers/gpu/drm/i915/intel_engine_cs.c | 46 +-
drivers/gpu/drm/i915/intel_fbc.c | 2 +-
drivers/gpu/drm/i915/intel_fbdev.c | 2 +-
drivers/gpu/drm/i915/intel_hdmi.c | 21 +-
drivers/gpu/drm/i915/intel_i2c.c | 2 +-
drivers/gpu/drm/i915/intel_lrc.c | 83 +-
drivers/gpu/drm/i915/intel_opregion.h | 6 +-
drivers/gpu/drm/i915/intel_pm.c | 589 ++++++-----
drivers/gpu/drm/i915/intel_psr.c | 118 ++-
drivers/gpu/drm/i915/intel_ringbuffer.c | 72 +-
drivers/gpu/drm/i915/intel_ringbuffer.h | 25 +-
drivers/gpu/drm/i915/intel_runtime_pm.c | 4 +-
drivers/gpu/drm/i915/intel_sprite.c | 138 ++-
drivers/gpu/drm/i915/intel_vdsc.c | 1088 ++++++++++++++++++++
drivers/gpu/drm/i915/intel_workarounds.c | 999 ++++++++++--------
drivers/gpu/drm/i915/intel_workarounds.h | 36 +-
drivers/gpu/drm/i915/selftests/igt_reset.c | 44 +
drivers/gpu/drm/i915/selftests/igt_reset.h | 15 +
drivers/gpu/drm/i915/selftests/igt_spinner.c | 199 ++++
drivers/gpu/drm/i915/selftests/igt_spinner.h | 37 +
drivers/gpu/drm/i915/selftests/intel_hangcheck.c | 63 +-
drivers/gpu/drm/i915/selftests/intel_lrc.c | 301 +-----
drivers/gpu/drm/i915/selftests/intel_workarounds.c | 247 ++++-
fs/sysfs/file.c | 4 +-
include/drm/drm_dp_helper.h | 3 +-
include/drm/drm_dsc.h | 485 +++++++++
include/linux/sysfs.h | 8 +-
61 files changed, 5364 insertions(+), 1972 deletions(-)
create mode 100644 drivers/gpu/drm/drm_dsc.c
create mode 100644 drivers/gpu/drm/i915/intel_vdsc.c
create mode 100644 drivers/gpu/drm/i915/selftests/igt_reset.c
create mode 100644 drivers/gpu/drm/i915/selftests/igt_reset.h
create mode 100644 drivers/gpu/drm/i915/selftests/igt_spinner.c
create mode 100644 drivers/gpu/drm/i915/selftests/igt_spinner.h
create mode 100644 include/drm/drm_dsc.h
--
Jani Nikula, Intel Open Source Graphics Center
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