On Thu, Nov 29, 2018 at 01:57:38PM -0500, Rob Clark wrote: > On Thu, Nov 29, 2018 at 12:24 PM Tomasz Figa <tfiga@xxxxxxxxxxxx> wrote: > > > > [CC Marek] > > > > On Thu, Nov 29, 2018 at 9:09 AM Daniel Vetter <daniel@xxxxxxxx> wrote: > > > > > > On Thu, Nov 29, 2018 at 5:57 PM Christoph Hellwig <hch@xxxxxx> wrote: > > > > > > > > Note that one thing I'd like to avoid is exposing these funtions directly > > > > to drivers, as that will get us into all kinds of abuses. > > > > > > What kind of abuse do you expect? It could very well be that gpu folks > > > call that "standard use case" ... At least on x86 with the i915 driver > > > we pretty much rely on architectural guarantees for how cache flushes > > > work very much. Down to userspace doing the cache flushing for > > > mappings the kernel has set up. > > > > i915 is a very specific case of a fully contained, > > architecture-specific hardware subsystem, where you can just hardcode > > all integration details inside the driver, because nobody else would > > care. > > > > In ARM world, you can have the same IP blocks licensed by multiple SoC > > vendors with different integration details and that often includes the > > option of coherency. > > fwiw, I believe all the GPU IP blocks that are used across multiple > SoCs have their own GPU MMU (potentially in addition to an iommu?). > So the dma-api is a much better fit for them.. drm/msm is a lot > closer to drm/i915 scenario, so I don't so much care if the solution > to our unique problem isn't something that would work for other > drivers ;-) Right now maybe, but I fully except the entire coherent vs. non-coherent transactions hilarity that we have on the bigger intel socs since a few years already to trickle down into smaller (arm based socs) eventually. I think Apple is already there since a few generations. So maybe we won't have to fight the iommu side of the dma-api anymore on these, but we'll still have to fight the cache maintenance side of dma-api. You can tell the dma-api to not flush, but then you don't have any other way to actually flush that's acceptable for arch/arm (on x86 we just run clflush in userspace and call it a day). -Daniel -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
