On Thu, Nov 29, 2018 at 01:48:15PM -0500, Rob Clark wrote: > On Thu, Nov 29, 2018 at 10:54 AM Christoph Hellwig <hch@xxxxxx> wrote: > > > > On Thu, Nov 29, 2018 at 09:42:50AM -0500, Rob Clark wrote: > > > Maybe the thing we need to do is just implement a blacklist of > > > compatible strings for devices which should skip the automatic > > > iommu/dma hookup. Maybe a bit ugly, but it would also solve a problem > > > preventing us from enabling per-process pagetables for a5xx (where we > > > need to control the domain/context-bank that is allocated by the dma > > > api). > > > > You can detach from the dma map attachment using arm_iommu_detach_device, > > which a few drm drivers do, but I don't think this is the problem. > > I think even with detach, we wouldn't end up with the context-bank > that the gpu firmware was hard-coded to expect, and so it would > overwrite the incorrect page table address register. (I could be > mis-remembering that, Jordan spent more time looking at that. But it > was something along those lines.) Right - basically the DMA domain steals context bank 0 and the GPU is hard coded to use that context bank for pagetable switching. I believe the Tegra guys also had a similar problem with a hard coded context bank. This is a discussion we do need to have but not at the risk of derailing the caching discussion which is arguably more important and has much wider ranging implications for multimedia and Ion and such. Jordan -- The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
