Re: [PATCH v2] drm/panel: Set max rate for Ilitek ILI9881C

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On 18.11.2018 22:31, Linus Walleij wrote:
> After adding the hs_rate and lp_rate fields to the DSI device
> we need to populate these accordingly so display drivers can
> respect them.
>
> This figure for HS rate comes from the ILI9881C manual, the
> calculation is explained in the comment.
>
> Cc: Daniel Vetter <daniel.vetter@xxxxxxxx>
> Cc: Andrzej Hajda <a.hajda@xxxxxxxxxxx>
> Acked-by: Maxime Ripard <maxime.ripard@xxxxxxxxxxx>
> Signed-off-by: Linus Walleij <linus.walleij@xxxxxxxxxx>
> ---
> ChangeLog v1->v2:
> - Add LP speed after Andrzej's observation.
> - Collect Maxime's ACK (hope it's fine also with the LP speed)
> ---
>  drivers/gpu/drm/panel/panel-ilitek-ili9881c.c | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
>
> diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c
> index 3ad4a46c4e94..bd276c666318 100644
> --- a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c
> +++ b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c
> @@ -465,6 +465,19 @@ static int ili9881c_dsi_probe(struct mipi_dsi_device *dsi)
>  	dsi->mode_flags = MIPI_DSI_MODE_VIDEO_SYNC_PULSE;
>  	dsi->format = MIPI_DSI_FMT_RGB888;
>  	dsi->lanes = 4;
> +	/*
> +	 * The datasheet (table 39) specifies "limited clock channel speed"
> +	 * for 4 lanes as 550 Mbps for RGB888. As this is 4 bits at the time,
> +	 * the maximum HS frequency is 550/4 = 137.5 MHz.
> +	 */
> +	dsi->hs_rate = 137500000;
> +	/*
> +	 * Table 42 says: "Length of LP-00, LP-01, LP-10 or LP-11 periods":
> +	 * min 50ns, max 75ns. 1/50ns = max LPM rate = 20.000.000Hz.
> +	 * Since LP transmissions are to periods per bit, this should be


s/to/two/


Reviewed-by: Andrzej Hajda <a.hajda@xxxxxxxxxxx>

 --
Regards
Andrzej


> +	 * 10 MHz.
> +	 */
> +	dsi->lp_rate = 10000000;
>  
>  	return mipi_dsi_attach(dsi);
>  }


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