Add mdss, dsi, dsi_phy, dsi pinctrl and truly nt35597 panel nodes to sdm845 MTP board dtsi. Changes in v4: - patch introduced in the series - move around added nodes to preserve alphabetical order (Doug Anderson) Signed-off-by: Jeykumar Sankaran <jsanka@xxxxxxxxxxxxxx> --- arch/arm64/boot/dts/qcom/sdm845-mtp.dts | 124 ++++++++++++++++++++++++++++++++ 1 file changed, 124 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts index eedfaf8..eb2a05b 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts @@ -7,6 +7,7 @@ /dts-v1/; +#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/regulator/qcom,rpmh-regulator.h> #include "sdm845.dtsi" @@ -343,11 +344,118 @@ }; }; +&dsi0 { + status = "okay"; + qcom,dual-dsi-mode; + qcom,master-dsi; + qcom,sync-dual-dsi; + + vdda-supply = <&vdda_mipi_dsi0_1p2>; + + panel@0 { + compatible = "truly,nt35597-2K-display"; + reg = <0>; + + vdda-supply = <&vreg_l14a_1p88>; + vdispp-supply = <&lab_regulator>; + vdispn-supply = <&ibb_regulator>; + + pinctrl-names = "default", "suspend"; + pinctrl-0 = <&dpu_dsi_active>; + pinctrl-1 = <&dpu_dsi_suspend>; + + reset-gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>; + mode-gpios = <&tlmm 52 GPIO_ACTIVE_HIGH>; + + display-timings { + timing0: timing-0 { + /* originally + * 268316160 Mhz, + * but value below fits + * better w/ downstream + */ + clock-frequency = <268316138>; + hactive = <1440>; + vactive = <2560>; + hfront-porch = <200>; + hback-porch = <64>; + hsync-len = <32>; + vfront-porch = <8>; + vback-porch = <7>; + vsync-len = <1>; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + panel0_in: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + + port@1 { + reg = <1>; + panel1_in: endpoint { + remote-endpoint = <&dsi1_out>; + }; + }; + }; + }; + + ports { + port@1 { + endpoint { + remote-endpoint = <&panel0_in>; + data-lanes = <0 1 2 3>; + }; + }; + }; +}; + +&dsi0_phy { + status = "okay"; + vdds-supply = <&vdda_mipi_dsi0_pll>; +}; + +&dsi1 { + status = "okay"; + + qcom,dual-dsi-mode; + qcom,sync-dual-dsi; + + vdda-supply = <&vdda_mipi_dsi1_1p2>; + + ports { + port@1 { + endpoint { + remote-endpoint = <&panel1_in>; + data-lanes = <0 1 2 3>; + }; + }; + }; +}; + +&dsi1_phy { + status = "okay"; + vdds-supply = <&vdda_mipi_dsi1_pll>; +}; + &i2c10 { status = "okay"; clock-frequency = <400000>; }; +&mdss { + status = "okay"; +}; + +&mdss_mdp { + status = "okay"; +}; + &qupv3_id_1 { status = "okay"; }; @@ -419,6 +527,22 @@ /* PINCTRL - additions to nodes defined in sdm845.dtsi */ +&dpu_dsi_active { + pinconf { + pins = "gpio6", "gpio52"; + drive-strength = <8>; + bias-disable; + }; +}; + +&dpu_dsi_suspend { + pinconf { + pins = "gpio6", "gpio52"; + drive-strength = <2>; + bias-pull-down; + }; +}; + &qup_i2c10_default { pinconf { pins = "gpio55", "gpio56"; -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel