Hi,
On Thu, Nov 1, 2018 at 7:25 PM Jeykumar Sankaran <jsanka@xxxxxxxxxxxxxx> wrote:
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -978,6 +978,197 @@
> #thermal-sensor-cells = <1>;
> };
Note that your patch doesn't cleanly apply to Andy's tree. Context
here shows that you have it between the thermal sensor and the SPMI
bus but the "qcom,sdm845-aoss-cc" node is there in. It's easy enough
to resolve, but it's usually considered nice to post patches that the
maintainers can apply.
When resolving this myself, I realized that you have the node in the
wrong place anyway. Nodes with a unit address should be sorted by
unit address. As you unit address is ae00000 you should be right
above 'dispcc: clock-controller@af00000'.
> + mdss: mdss@ae00000 {
> + compatible = "qcom,sdm845-mdss";
> + reg = <0xae00000 0x1000>;
> + reg-names = "mdss";
> +
> + power-domains = <&dispcc 0>;
> +
> + clocks = <&gcc GCC_DISP_AHB_CLK>,
> + <&gcc GCC_DISP_AXI_CLK>,
> + <&dispcc DISP_CC_MDSS_MDP_CLK>;
> + clock-names = "iface", "bus", "core";
> +
> + assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>;
> + assigned-clock-rates = <300000000>;
> +
> + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-controller;
> + #interrupt-cells = <1>;
> +
> + iommus = <&apps_smmu 0x880 0x8>,
> + <&apps_smmu 0xc80 0x8>;
> +
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + mdss_mdp: mdp@ae01000 {
> + compatible = "qcom,sdm845-dpu";
> + reg = <0x0ae01000 0x8f000>,
> + <0x0aeb0000 0x2008>;
> + reg-names = "mdp", "vbif";
> +
> + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
> + <&dispcc DISP_CC_MDSS_AXI_CLK>,
> + <&dispcc DISP_CC_MDSS_MDP_CLK>,
> + <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
> + clock-names = "iface", "bus", "core", "vsync";
> +
> + assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>,
> + <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
> + assigned-clock-rates = <300000000>,
> + <19200000>;
> +
> + interrupt-parent = <&mdss>;
> + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + dpu_intf1_out: endpoint {
> + remote-endpoint = <&dsi0_in>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + dpu_intf2_out: endpoint {
> + remote-endpoint = <&dsi1_in>;
> + };
> + };
> + };
> + };
> +
> + dsi0: dsi@ae94000 {
> + compatible = "qcom,mdss-dsi-ctrl";
> + reg = <0xae94000 0x400>;
> + reg-names = "dsi_ctrl";
> +
> + interrupt-parent = <&mdss>;
> + interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
> +
> + clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
> + <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
> + <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
> + <&dispcc DISP_CC_MDSS_ESC0_CLK>,
> + <&dispcc DISP_CC_MDSS_AHB_CLK>,
> + <&dispcc DISP_CC_MDSS_AXI_CLK>;
> + clock-names = "byte_clk",
> + "byte_intf_clk",
> + "pixel_clk",
> + "core_clk",
> + "iface_clk",
> + "bus_clk";
msm_dsi ae94000.dsi: Using legacy clk name binding. Use "iface"
instead of "iface_clk"
msm_dsi ae94000.dsi: Using legacy clk name binding. Use "bus" instead
of "bus_clk"
msm_dsi ae94000.dsi: Using legacy clk name binding. Use "byte"
instead of "byte_clk"
msm_dsi ae94000.dsi: Using legacy clk name binding. Use "pixel"
instead of "pixel_clk"
msm_dsi ae94000.dsi: Using legacy clk name binding. Use "core"
instead of "core_clk"
msm_dsi ae94000.dsi: Using legacy clk name binding. Use "byte_intf"
instead of "byte_intf_clk"
> +
> + phys = <&dsi0_phy>;
> + phy-names = "dsi-phy";
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + dsi0_in: endpoint {
> + remote-endpoint = <&dpu_intf1_out>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + dsi0_out: endpoint {
> + };
> + };
> + };
> + };
> +
> + dsi0_phy: dsi-phy@ae94400 {
> + compatible = "qcom,dsi-phy-10nm";
> + reg = <0xae94400 0x200>,
> + <0xae94a00 0x1e0>,
> + <0xae94600 0x280>;
> + reg-names = "dsi_phy",
> + "dsi_pll",
> + "dsi_phy_lane";
> +
> + #clock-cells = <1>;
> + #phy-cells = <0>;
> +
> + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>;
> + clock-names = "iface_clk";
msm_dsi_phy ae94400.dsi-phy: Using legacy clk name binding. Use
"iface" instead of "iface_clk"
> + };
> +
> + dsi1: dsi@ae96000 {
> + compatible = "qcom,mdss-dsi-ctrl";
> + reg = <0xae96000 0x400>;
> + reg-names = "dsi_ctrl";
> +
> + interrupt-parent = <&mdss>;
> + interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
> +
> + clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,
> + <&dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>,
> + <&dispcc DISP_CC_MDSS_PCLK1_CLK>,
> + <&dispcc DISP_CC_MDSS_ESC1_CLK>,
> + <&dispcc DISP_CC_MDSS_AHB_CLK>,
> + <&dispcc DISP_CC_MDSS_AXI_CLK>;
> + clock-names = "byte_clk",
> + "byte_intf_clk",
> + "pixel_clk",
> + "core_clk",
> + "iface_clk",
> + "bus_clk";
More places to remove "_clk"
> +
> + phys = <&dsi1_phy>;
> + phy-names = "dsi-phy";
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + dsi1_in: endpoint {
> + remote-endpoint = <&dpu_intf2_out>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + dsi1_out: endpoint {
> + };
> + };
> + };
> + };
> +
> + dsi1_phy: dsi-phy@ae96400 {
> + compatible = "qcom,dsi-phy-10nm";
> + reg = <0xae96400 0x200>,
> + <0xae96a00 0x10e>,
> + <0xae96600 0x280>;
> + reg-names = "dsi_phy",
> + "dsi_pll",
> + "dsi_phy_lane";
> +
> + #clock-cells = <1>;
> + #phy-cells = <0>;
> +
> + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>;
> + clock-names = "iface_clk";
...and another "_clk" to remove.
-Doug
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