On Thu, Oct 25, 2018 at 05:22:18PM +0300, Ville Syrjälä wrote:
> On Wed, Oct 24, 2018 at 03:28:38PM -0700, Manasi Navare wrote:
> > A separate power well 2 (PG2) is required for VDSC on eDP transcoder
> > whereas all other transcoders use the power wells associated with the
> > transcoders for VDSC.
> > This patch adds a helper to obtain correct power domain depending on
> > transcoder being used and enables/disables the power wells during
> > VDSC enabling/disabling.
> >
> > v2:
> > * Fix tabs, const crtc_state, fix comments (Ville)
> >
> > Suggested-by: Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx>
> > Cc: Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx>
> > Cc: Imre Deak <imre.deak@xxxxxxxxx>
> > Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
> > Signed-off-by: Manasi Navare <manasi.d.navare@xxxxxxxxx>
> > Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> > ---
> > drivers/gpu/drm/i915/intel_vdsc.c | 26 ++++++++++++++++++++++++++
> > 1 file changed, 26 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_vdsc.c b/drivers/gpu/drm/i915/intel_vdsc.c
> > index 5e76b4a44d90..0fed36e2491a 100644
> > --- a/drivers/gpu/drm/i915/intel_vdsc.c
> > +++ b/drivers/gpu/drm/i915/intel_vdsc.c
> > @@ -581,6 +581,24 @@ int intel_dp_compute_dsc_params(struct intel_dp *intel_dp,
> > return 0;
> > }
> >
> > +static enum intel_display_power_domain
> > +intel_dsc_get_power_domains(const struct intel_crtc_state *crtc_state)
>
> intel_dsc_power_domain() or something like that to match
> the naming convention introduced by intel_ddi_main_link_aux_domain()?
Ok i can rename to use intel_dsc_power_domain() but it should still live
in intel_vdsc.c right?
>
> Oh, and we'll need to update intel_ddi_get_power_domains() as well.
We would need to add this power domain here so that its obtained during
the intel_modeset_setup_hw_state()..?
Manasi
>
> > +{
> > + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> > +
> > + /*
> > + * On ICL VDSC/joining for eDP transcoder uses a separate power well PW2
> > + * This requires POWER_DOMAIN_TRANSCODER_EDP_VDSC power domain.
> > + * For any other transcoder, VDSC/joining uses the power well associated
> > + * with the pipe/transcoder in use. Hence another reference on the
> > + * transcoder power domain will suffice.
> > + */
> > + if (cpu_transcoder == TRANSCODER_EDP)
> > + return POWER_DOMAIN_TRANSCODER_EDP_VDSC;
> > + else
> > + return POWER_DOMAIN_TRANSCODER(cpu_transcoder);
> > +}
> > +
> > static void intel_configure_pps_for_dsc_encoder(struct intel_encoder *encoder,
> > struct intel_crtc_state *crtc_state)
> > {
> > @@ -1020,6 +1038,10 @@ void intel_dsc_enable(struct intel_encoder *encoder,
> > if (!crtc_state->dsc_params.compression_enable)
> > return;
> >
> > + /* Enable Power wells for VDSC/joining */
> > + intel_display_power_get(dev_priv,
> > + intel_dsc_get_power_domains(crtc_state));
> > +
> > intel_configure_pps_for_dsc_encoder(encoder, crtc_state);
> >
> > intel_dp_send_dsc_pps_sdp(encoder, crtc_state);
> > @@ -1074,4 +1096,8 @@ void intel_dsc_disable(struct intel_encoder *encoder,
> > RIGHT_BRANCH_VDSC_ENABLE);
> > I915_WRITE(dss_ctl2_reg, dss_ctl2_val);
> >
> > + /* Disable Power wells for VDSC/joining */
> > + intel_display_power_put(dev_priv,
> > + intel_dsc_get_power_domains(old_crtc_state));
> > +
>
> Bogus newline here.
>
> > }
> > --
> > 2.18.0
>
> --
> Ville Syrjälä
> Intel
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