Re: [PATCH v2] drm: dsi: Add lane clock rate fields to DSI device

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



On Thu, Oct 18, 2018 at 1:19 PM Linus Walleij <linus.walleij@xxxxxxxxxx> wrote:

> The DSI devices have a maximum operating frequency specified
> in their data sheet per the MIPI specification, and DSI hosts
> that can scale their frequency need this information to set
> their clock dividers right.
>
> As current panel drivers often lack this information, specify
> that setting it to zero will make the DSI host use some
> reasonable default.
>
> Cc: Andrzej Hajda <a.hajda@xxxxxxxxxxx>
> Signed-off-by: Linus Walleij <linus.walleij@xxxxxxxxxx>
> ---
> ChangeLog v1->v2:
> - s/*_rate_hz/*_rate/g
> - s/operation/mode/g
> - Clarify that zero is only allowed for legacy drivers

Andrzej are you fine with this version (Acked-by) so I can apply it?

Yours,
Linus Walleij
_______________________________________________
dri-devel mailing list
dri-devel@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/dri-devel




[Index of Archives]     [Linux DRI Users]     [Linux Intel Graphics]     [Linux USB Devel]     [Video for Linux]     [Linux Audio Users]     [Yosemite News]     [Linux Kernel]     [Linux SCSI]     [XFree86]     [Linux USB Devel]     [Video for Linux]     [Linux Audio Users]     [Linux Kernel]     [Linux SCSI]     [XFree86]
  Powered by Linux