On Tue, Oct 16, 2018 at 10:01:11PM +0300, Ville Syrjälä wrote:
> On Fri, Oct 05, 2018 at 04:22:57PM -0700, Manasi Navare wrote:
> > On Icelake, a separate power well PG2 is created for
> > VDSC engine used for eDP/MIPI DSI. This patch adds a new
> > display power domain for Power well 2.
> >
> > v2:
> > * Fix the power well mismatch CI error (Ville)
> > * Rename as VDSC_PIPE_A (Imre)
> > * Fix a whitespace (Anusha)
> > * Fix Comments (Imre)
> >
> > Cc: Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx>
> > Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
> > Cc: Imre Deak <imre.deak@xxxxxxxxx>
> > Signed-off-by: Manasi Navare <manasi.d.navare@xxxxxxxxx>
> > ---
> > drivers/gpu/drm/i915/intel_display.h | 1 +
> > drivers/gpu/drm/i915/intel_runtime_pm.c | 4 +++-
> > 2 files changed, 4 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.h b/drivers/gpu/drm/i915/intel_display.h
> > index 9eaba1bccae8..4c513169960c 100644
> > --- a/drivers/gpu/drm/i915/intel_display.h
> > +++ b/drivers/gpu/drm/i915/intel_display.h
> > @@ -256,6 +256,7 @@ enum intel_display_power_domain {
> > POWER_DOMAIN_MODESET,
> > POWER_DOMAIN_GT_IRQ,
> > POWER_DOMAIN_INIT,
> > + POWER_DOMAIN_VDSC_PIPE_A,
>
> I'd probably put it next to the other pipe related power domains.
> So maybe after POWER_DOMAIN_PIPE_C_PANEL_FITTER.
>
> And to match the current naming pattern it should be called
> POWER_DOMAIN_PIPE_A_VDSC.
Hmm. We could also give it an alias TRANSCODER_EDP_VDSC. Making
it an alias would avoid wasting yet another bit, but would make
the code easier to understand as we wouldn't have to add comments
explaining why we use a PIPE_A_VDSC power domain based on the
usage of the EDP transcoder.
The only slightly confusing piece would be
intel_display_power_domain_str() as that would have to reuturn
a string with both names perhaps?
>
> >
> > POWER_DOMAIN_NUM,
> > };
> > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > index 3cf8533e0834..3ed0a3a1015a 100644
> > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > @@ -146,6 +146,8 @@ intel_display_power_domain_str(enum intel_display_power_domain domain)
> > return "MODESET";
> > case POWER_DOMAIN_GT_IRQ:
> > return "GT_IRQ";
> > + case POWER_DOMAIN_VDSC_PIPE_A:
> > + return "VDSC_PIPE_A";
> > default:
> > MISSING_CASE(domain);
> > return "?";
> > @@ -1971,9 +1973,9 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
> > */
> > #define ICL_PW_2_POWER_DOMAINS ( \
> > ICL_PW_3_POWER_DOMAINS | \
> > + BIT_ULL(POWER_DOMAIN_VDSC_PIPE_A) | \
> > BIT_ULL(POWER_DOMAIN_INIT))
> > /*
> > - * - eDP/DSI VDSC
> > * - KVMR (HW control)
> > */
> > #define ICL_DISPLAY_DC_OFF_POWER_DOMAINS ( \
> > --
> > 2.18.0
>
> --
> Ville Syrjälä
> Intel
--
Ville Syrjälä
Intel
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