On 04.09.2018 14:10, Laurent Pinchart wrote: > The THC63LVD1024 is restricted to a pixel clock frequency in the range > of 8 to 135 MHz. Implement the bridge .mode_valid() operation > accordingly. > > Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@xxxxxxxxxxxxxxxx> Reviewed-by: Andrzej Hajda <a.hajda@xxxxxxxxxxx> -- Regards Andrzej _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
