Re: [Intel-gfx] [PATCH] intel: Detect cache domain inconsistency with valgrind

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On Sat, Feb 11, 2012 at 11:47:36AM +0000, Chris Wilson wrote:
> Every access to either the GTT or CPU pointer is supposed to be
> proceeded by a set_domain ioctl so that GEM is able to manage the cache
> domains correctly and for the following access to be coherent. Of
> course, some people explicitly want incoherent, non-blocking access
> which is going to trigger warnings by this patch but are probably better
> served by explicit suppression.
> 
> v2: Also mark the pointers as inaccessible following the explicit unmap
> and implicit unmap upon return to the cache.
> 
> Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
Reviewed-by: Daniel Vetter <daniel.vetter@xxxxxxxx>
-- 
Daniel Vetter
Mail: daniel@xxxxxxxx
Mobile: +41 (0)79 365 57 48
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