Comment # 64
on bug 105760
from Peter Wu
(In reply to Thomas Martitz from comment #62) > To recap, the original bug (panic with that particular backtrace) is also > fixed for me. In that case, it is probably better to open a new bug report (and refer to this bug for context) for other issues. > It may be worth noting that on my system the eGPU seems to be behind the > same PCIe bridge as the TB3 port. I think I need at least to disable runtime > pm for that bridge but that alone isn't sufficient from my testing. The dGPU and TB devices appear behind different bridges (lspci -tv): -[0000:00]-+-00.0 Intel Corporation Xeon E3-1200 v6/7th Gen Core Processor Host Bridge/DRAM Registers ... +-1c.0-[01]----00.0 Advanced Micro Devices, Inc. [AMD/ATI] Lexa XT [Radeon PRO WX 3100] ... +-1c.4-[03-3b]----00.0-[04-3b]--+-00.0-[05]----00.0 Intel Corporation JHL6340 Thunderbolt 3 NHI (C step) [Alpine Ridge 2C 2016] (In reply to Thomas Martitz from comment #63) > Maybe https://bugzilla.kernel.org/show_bug.cgi?id=156341 is related? I found > a related thread on the nouveau ML ("Rewriting Intel PCI bridge prefetch > base address bits solves nvidia graphics issues") that seems to talk about > similar resume problems. Maybe related (or maybe not), that's why I was asking for some detail (thanks for providing these!). But please do open a new bug since the original issue appears to be solved.
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