Hello this series improves the DU peripheral input clock selection procedure, fixing high-resolution modes for non-DPLL channels, as DPAD and LVDS ones. The first patch in the series is a rework from Laurent of the clock selection procedure, clearly separating DPLL equipped channels from channels only equipped with an interanl divider. The non-DPLL channels clock input selection procedure is improved in patch [3/3] by exploiting the external clock source ability to generate the desired pixel clock (when possible). This improvements is sparkled from the following BSP patch https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas-bsp.git/commit/ ?id=32e9be612773ce0ed75295a10764151633938528 that un-conditionally uses the externally generated clock source as output pixel clock. Tested on M3-W Salvator-X board and VGA output: fixes 1920x1080 display. Jacopo Mondi (2): drm: rcar-du: Rename var to a more precise name drm: rcar-du: Improve non-DPLL clock selection Laurent Pinchart (1): drm: rcar-du: Rework clock configuration based on hardware limits drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 182 ++++++++++++++++++++++----------- 1 file changed, 122 insertions(+), 60 deletions(-) -- 2.7.4 _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
