Hi Tomi, Thank you for the patch. On Monday, 18 June 2018 16:22:35 EEST Tomi Valkeinen wrote: > Add DT bindings for Texas Instruments K2G SoC Display Subsystem. The DSS > is quite simple, with a single plane and a single output. > > Signed-off-by: Tomi Valkeinen <tomi.valkeinen@xxxxxx> > Cc: devicetree@xxxxxxxxxxxxxxx > Reviewed-by: Rob Herring <robh@xxxxxxxxxx> > --- > .../devicetree/bindings/display/ti/ti,k2g-dss.txt | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > create mode 100644 > Documentation/devicetree/bindings/display/ti/ti,k2g-dss.txt > > diff --git a/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.txt > b/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.txt new file mode > 100644 > index 000000000000..1af11425eda3 > --- /dev/null > +++ b/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.txt > @@ -0,0 +1,15 @@ > +Texas Instruments K2G Display Subsystem > +======================================= > + > +Required properties: > +- compatible: "ti,k2g-dss" > +- reg: address and length of the register spaces for DSS submodules > +- reg-names: "cfg", "common", "vid1", "ovr1", "vp1" When seeing multiple register ranges for a DT node I always suspect that we describe multiple IP cores that could be better modeled as independent nodes. What prompted you not to model the DISPC as a separate DT node (possibly a child of the DSS DT node) ? Furthermore, "cfg" corresponds to the DSS registers, so I wonder whether it shouldn't be named "dss". Similarly, "common" really sounds like DSS common registers, while it relates to the DISPC. > +- clocks: phandle to fclk and vp1 clocks > +- clock-names: "fck", "vp1" > +- interrupts: phandle to the DISPC interrupt > + > +The DSS outputs are described using the device graphs as documented in > +Documentation/devicetree/bindings/graph.txt. K2G DSS has a single DPI > output as > +port 0. Both SPRUHY8H and SPRSP07D document a DPI output and a DBI output. Am I looking at the wrong document ? > + Extra blank line ? -- Regards, Laurent Pinchart _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
