Re: [PATCH 4/4] drm/i915/intel_dsi: Read back pclk set by GOP and use that as pclk

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Hi,

On 07/09/2018 08:14 PM, Ville Syrjälä wrote:
On Sat, Jul 07, 2018 at 08:32:16AM +0200, Hans de Goede wrote:

<snip>

Any kind of hack that involves reading out the hardware state should go
into something like intel_sanitize_encoder(). Actually by that time we
have already read out the hw state, so it shouldn't require any
modifications to the existing dsi code itself.

I do not think that intel_sanitize encoder is the right place to do this:

* I don't want to modify the read-back state, I want to modify our
    calculated "new/ideal" state to match the read-back state

I wasn't suggesting that. What I meant is that you already have the
state there to look so you don't have to hack the readout functions
to function without a state being around.

That said, we do already have intel_encoder_current_mode() which is doing
something similar to what you're proposing. So probably should just
try to reuse that.

Ah yes that should work and will allow me to drop 2 of the 3 preparation
patches (I still need the patch which initializes the encoder enough that
it can be passed to get_hw_state() from intel_dsi_init_vbt().

So something like this ?   :

From 82db375919be9b95e680dc5b1f660d5ef1efcc94 Mon Sep 17 00:00:00 2001
From: Hans de Goede <hdegoede@xxxxxxxxxx>
Date: Tue, 10 Jul 2018 08:59:27 +0200
Subject: [PATCH] drm/i915/intel_dsi: Read back pclk set by GOP and use that as
 pclk

On BYT and CHT the GOP sometimes initializes the pclk at a (slightly)
different frequency then the pclk which we've calculated.

This commit makes the DSI code read-back the pclk set by the GOP and
if that is within a reasonable margin of the calculated pclk, uses
that instead.

This fixes the first modeset being a full modeset instead of a
fast modeset on systems where the GOP pclk is different.

Changes in v2:
-Use intel_encoder_current_mode() to get the pclk setup by the GOP

Signed-off-by: Hans de Goede <hdegoede@xxxxxxxxxx>
---
 drivers/gpu/drm/i915/intel_dsi_vbt.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_dsi_vbt.c b/drivers/gpu/drm/i915/intel_dsi_vbt.c
index 4d6ffa7b3e7b..828d5ac0dfef 100644
--- a/drivers/gpu/drm/i915/intel_dsi_vbt.c
+++ b/drivers/gpu/drm/i915/intel_dsi_vbt.c
@@ -506,6 +506,7 @@ bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id)
 	struct mipi_config *mipi_config = dev_priv->vbt.dsi.config;
 	struct mipi_pps_data *pps = dev_priv->vbt.dsi.pps;
 	struct drm_display_mode *mode = dev_priv->vbt.lfp_lvds_vbt_mode;
+	struct drm_display_mode *curr;
 	u32 bpp;
 	u32 tlpx_ns, extra_byte_count, bitrate, tlpx_ui;
 	u32 ui_num, ui_den;
@@ -583,6 +584,23 @@ bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id)
 	} else
 		burst_mode_ratio = 100;

+	/*
+	 * On BYT / CRC the GOP sometimes picks a slightly different pclk,
+	 * read back the GOP configured pclk and prefer it over ours.
+	 */
+	if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
+		curr = intel_encoder_current_mode(&intel_dsi->base);
+		if (curr) {
+			DRM_DEBUG_KMS("Calculated pclk %d GOP %d\n",
+				      pclk, curr->clock);
+			if (curr->clock >= (pclk * 9 / 10) &&
+			    curr->clock <= (pclk * 11 / 10))
+				pclk = curr->clock;
+
+			kfree(curr);
+		}
+	}
+
 	intel_dsi->burst_mode_ratio = burst_mode_ratio;
 	intel_dsi->pclk = pclk;


Note this is untested as I'm travelling at the moment. I will test
this when I'm back home and send out a v2.

Regards,

Hans



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