Currently, each drm plane controls a single HW pipe. For all
use cases where plane width exceeds the maximum pipe width,
the DPU driver will require more than one HW pipe.
This patchset enables virtualization of planes through
the following changes:
(1) Expose all the planes with the superset of formats and
without any static binding of HW pipe during the initialization.
(2) Introduce the state based plane resource management.
(3) Dynamically assign a maximum of two pipes per plane based on
plane capabilities in atomic check.
This patchset is based on https://patchwork.kernel.org/patch/10471479/
Sravanthi Kollukuduru (5):
drm/msm/dpu: remove smart dma support
drm/msm/dpu: enable cursor plane for primary crtc
drm/msm/dpu: remove static binding of hw pipe to plane
drm/msm/dpu: introduce state based plane resource management
drm/msm/dpu: dynamic assignment of hw pipe to plane
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 103 +--
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 3 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 104 +--
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 69 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 76 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 4 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 159 +---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h | 56 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 48 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 1063 ++++++++++--------------
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h | 58 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 156 +++-
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 20 +
drivers/gpu/drm/msm/msm_drv.h | 2 +-
14 files changed, 744 insertions(+), 1177 deletions(-)
--
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