The dpu driver implements runtime_pm support for managing dpu specific resources like - clocks, bus bandwidth etc. Use pm_runtime_get/put_sync calls on dpu device. The common clocks and power management for all child nodes (mdp5/dpu, dsi, dp etc) is done by parent MDSS device/driver via runtime_pm due to parent child relationship. Changes in v3: - none Changes in v2: - none Signed-off-by: Rajesh Yadav <ryadav@xxxxxxxxxxxxxx> Reviewed-by: Sean Paul <seanpaul@xxxxxxxxxxxx> --- drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c | 8 ++--- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 12 ++++---- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 16 +++++----- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 45 +++++++--------------------- drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 6 ++-- 5 files changed, 31 insertions(+), 56 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c index 977adc4..5c5cc56 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c @@ -452,10 +452,10 @@ void dpu_core_irq_preinstall(struct dpu_kms *dpu_kms) } priv = dpu_kms->dev->dev_private; - dpu_power_resource_enable(&priv->phandle, dpu_kms->core_client, true); + pm_runtime_get_sync(&dpu_kms->pdev->dev); dpu_clear_all_irqs(dpu_kms); dpu_disable_all_irqs(dpu_kms); - dpu_power_resource_enable(&priv->phandle, dpu_kms->core_client, false); + pm_runtime_put_sync(&dpu_kms->pdev->dev); spin_lock_init(&dpu_kms->irq_obj.cb_lock); @@ -496,7 +496,7 @@ void dpu_core_irq_uninstall(struct dpu_kms *dpu_kms) } priv = dpu_kms->dev->dev_private; - dpu_power_resource_enable(&priv->phandle, dpu_kms->core_client, true); + pm_runtime_get_sync(&dpu_kms->pdev->dev); for (i = 0; i < dpu_kms->irq_obj.total_irqs; i++) if (atomic_read(&dpu_kms->irq_obj.enable_counts[i]) || !list_empty(&dpu_kms->irq_obj.irq_cb_tbl[i])) @@ -504,7 +504,7 @@ void dpu_core_irq_uninstall(struct dpu_kms *dpu_kms) dpu_clear_all_irqs(dpu_kms); dpu_disable_all_irqs(dpu_kms); - dpu_power_resource_enable(&priv->phandle, dpu_kms->core_client, false); + pm_runtime_put_sync(&dpu_kms->pdev->dev); kfree(dpu_kms->irq_obj.irq_cb_tbl); kfree(dpu_kms->irq_obj.enable_counts); diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c index 48920b05..e2d2e32 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c @@ -86,8 +86,12 @@ static inline int _dpu_crtc_power_enable(struct dpu_crtc *dpu_crtc, bool enable) dpu_kms = to_dpu_kms(priv->kms); - return dpu_power_resource_enable(&priv->phandle, dpu_kms->core_client, - enable); + if (enable) + pm_runtime_get_sync(&dpu_kms->pdev->dev); + else + pm_runtime_put_sync(&dpu_kms->pdev->dev); + + return 0; } /** @@ -2250,7 +2254,6 @@ static int _dpu_crtc_vblank_enable_no_lock( /* drop lock since power crtc cb may try to re-acquire lock */ mutex_unlock(&dpu_crtc->crtc_lock); - pm_runtime_get_sync(dev->dev); ret = _dpu_crtc_power_enable(dpu_crtc, true); mutex_lock(&dpu_crtc->crtc_lock); if (ret) @@ -2580,7 +2583,6 @@ static void dpu_crtc_disable(struct drm_crtc *crtc) /* disable clk & bw control until clk & bw properties are set */ cstate->bw_control = false; cstate->bw_split_vote = false; - pm_runtime_put_sync(crtc->dev->dev); mutex_unlock(&dpu_crtc->crtc_lock); } @@ -2611,8 +2613,6 @@ static void dpu_crtc_enable(struct drm_crtc *crtc, return; } - pm_runtime_get_sync(crtc->dev->dev); - drm_for_each_encoder(encoder, crtc->dev) { if (encoder->crtc != crtc) continue; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 4386360..298a6ef 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -268,8 +268,12 @@ static inline int _dpu_encoder_power_enable(struct dpu_encoder_virt *dpu_enc, dpu_kms = to_dpu_kms(priv->kms); - return dpu_power_resource_enable(&priv->phandle, dpu_kms->core_client, - enable); + if (enable) + pm_runtime_get_sync(&dpu_kms->pdev->dev); + else + pm_runtime_put_sync(&dpu_kms->pdev->dev); + + return 0; } void dpu_encoder_helper_report_irq_timeout(struct dpu_encoder_phys *phys_enc, @@ -796,10 +800,8 @@ static void _dpu_encoder_resource_control_helper(struct drm_encoder *drm_enc, } if (enable) { - pm_runtime_get_sync(dpu_kms->dev->dev); /* enable DPU core clks */ - dpu_power_resource_enable(&priv->phandle, - dpu_kms->core_client, true); + pm_runtime_get_sync(&dpu_kms->pdev->dev); /* enable all the irq */ _dpu_encoder_irq_control(drm_enc, true); @@ -809,9 +811,7 @@ static void _dpu_encoder_resource_control_helper(struct drm_encoder *drm_enc, _dpu_encoder_irq_control(drm_enc, false); /* disable DPU core clks */ - dpu_power_resource_enable(&priv->phandle, - dpu_kms->core_client, false); - pm_runtime_put_sync(dpu_kms->dev->dev); + pm_runtime_put_sync(&dpu_kms->pdev->dev); } } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index 85f3dbc..cda4d12 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -100,8 +100,7 @@ static int _dpu_danger_signal_status(struct seq_file *s, priv = kms->dev->dev_private; memset(&status, 0, sizeof(struct dpu_danger_safe_status)); - pm_runtime_get_sync(kms->dev->dev); - dpu_power_resource_enable(&priv->phandle, kms->core_client, true); + pm_runtime_get_sync(&kms->pdev->dev); if (danger_status) { seq_puts(s, "\nDanger signal status:\n"); if (kms->hw_mdp->ops.get_danger_status) @@ -113,8 +112,7 @@ static int _dpu_danger_signal_status(struct seq_file *s, kms->hw_mdp->ops.get_danger_status(kms->hw_mdp, &status); } - dpu_power_resource_enable(&priv->phandle, kms->core_client, false); - pm_runtime_put_sync(kms->dev->dev); + pm_runtime_put_sync(&kms->pdev->dev); seq_printf(s, "MDP : 0x%x\n", status.mdp); @@ -215,11 +213,7 @@ static int _dpu_debugfs_show_regset32(struct seq_file *s, void *data) seq_puts(s, " "); } - if (dpu_power_resource_enable(&priv->phandle, - dpu_kms->core_client, true)) { - seq_puts(s, "failed to enable dpu clocks\n"); - return 0; - } + pm_runtime_get_sync(&dpu_kms->pdev->dev); /* main register output */ for (i = 0; i < regset->blk_len; i += 4) { @@ -229,7 +223,7 @@ static int _dpu_debugfs_show_regset32(struct seq_file *s, void *data) seq_printf(s, " %08x", readl_relaxed(base + i)); } seq_puts(s, "\n"); - dpu_power_resource_enable(&priv->phandle, dpu_kms->core_client, false); + pm_runtime_put_sync(&dpu_kms->pdev->dev); return 0; } @@ -334,20 +328,12 @@ static void _dpu_debugfs_destroy(struct dpu_kms *dpu_kms) static int dpu_kms_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc) { - int ret; - - pm_runtime_get_sync(crtc->dev->dev); - ret = dpu_crtc_vblank(crtc, true); - pm_runtime_put_sync(crtc->dev->dev); - - return ret; + return dpu_crtc_vblank(crtc, true); } static void dpu_kms_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc) { - pm_runtime_get_sync(crtc->dev->dev); dpu_crtc_vblank(crtc, false); - pm_runtime_put_sync(crtc->dev->dev); } static void dpu_kms_wait_for_frame_transfer_complete(struct msm_kms *kms, @@ -409,8 +395,7 @@ static void dpu_kms_prepare_commit(struct msm_kms *kms, if (!dev || !dev->dev_private) return; priv = dev->dev_private; - pm_runtime_get_sync(dev->dev); - dpu_power_resource_enable(&priv->phandle, dpu_kms->core_client, true); + pm_runtime_get_sync(&dpu_kms->pdev->dev); list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) if (encoder->crtc != NULL) @@ -474,8 +459,7 @@ static void dpu_kms_complete_commit(struct msm_kms *kms, for_each_old_crtc_in_state(old_state, crtc, old_crtc_state, i) dpu_crtc_complete_commit(crtc, old_crtc_state); - dpu_power_resource_enable(&priv->phandle, dpu_kms->core_client, false); - pm_runtime_put_sync(dpu_kms->dev->dev); + pm_runtime_put_sync(&dpu_kms->pdev->dev); DPU_EVT32_VERBOSE(DPU_EVTLOG_FUNC_EXIT); } @@ -1624,13 +1608,8 @@ static int dpu_kms_hw_init(struct msm_kms *kms) dpu_kms->core_client = NULL; goto error; } - pm_runtime_get_sync(dev->dev); - rc = dpu_power_resource_enable(&priv->phandle, dpu_kms->core_client, - true); - if (rc) { - DPU_ERROR("resource enable failed: %d\n", rc); - goto error; - } + + pm_runtime_get_sync(&dpu_kms->pdev->dev); _dpu_kms_core_hw_rev_init(dpu_kms); @@ -1765,8 +1744,7 @@ static int dpu_kms_hw_init(struct msm_kms *kms) DPU_POWER_EVENT_POST_ENABLE, dpu_kms_handle_power_event, dpu_kms, "kms"); - dpu_power_resource_enable(&priv->phandle, dpu_kms->core_client, false); - pm_runtime_put_sync(dev->dev); + pm_runtime_put_sync(&dpu_kms->pdev->dev); return 0; @@ -1775,8 +1753,7 @@ static int dpu_kms_hw_init(struct msm_kms *kms) hw_intr_init_err: perf_err: power_error: - dpu_power_resource_enable(&priv->phandle, dpu_kms->core_client, false); - pm_runtime_put_sync(dev->dev); + pm_runtime_put_sync(&dpu_kms->pdev->dev); error: _dpu_kms_hw_destroy(dpu_kms); end: diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c index ba5230d..cf6c3fd 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c @@ -476,11 +476,9 @@ int dpu_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable) if (!pdpu->is_rt_pipe) goto end; - dpu_power_resource_enable(&priv->phandle, dpu_kms->core_client, true); - + pm_runtime_get_sync(&dpu_kms->pdev->dev); _dpu_plane_set_qos_ctrl(plane, enable, DPU_PLANE_QOS_PANIC_CTRL); - - dpu_power_resource_enable(&priv->phandle, dpu_kms->core_client, false); + pm_runtime_put_sync(&dpu_kms->pdev->dev); end: return 0; -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel