>-----Original Message----- >From: Intel-gfx [mailto:intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx] On Behalf Of >Ramalingam C >Sent: Tuesday, April 3, 2018 7:28 PM >To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx; dri-devel@xxxxxxxxxxxxxxxxxxxxx; >seanpaul@xxxxxxxxxxxx; daniel@xxxxxxxx; chris@xxxxxxxxxxxxxxxxxx; >jani.nikula@xxxxxxxxxxxxxxx; Winkler, Tomas <tomas.winkler@xxxxxxxxx>; >Usyskin, Alexander <alexander.usyskin@xxxxxxxxx> >Cc: Vivi, Rodrigo <rodrigo.vivi@xxxxxxxxx> >Subject: [Intel-gfx] [PATCH v3 24/40] drm/i915: Implement HDCP2.2 repeater >authentication > >Implements the HDCP2.2 repeaters authentication steps such as verifying the >downstream topology and sending stream management information. > >v2: > Rebased. >v3: > No Changes. > >Signed-off-by: Ramalingam C <ramalingam.c@xxxxxxxxx> >--- > drivers/gpu/drm/i915/intel_hdcp.c | 135 >++++++++++++++++++++++++++++++++++++++ > 1 file changed, 135 insertions(+) > >diff --git a/drivers/gpu/drm/i915/intel_hdcp.c >b/drivers/gpu/drm/i915/intel_hdcp.c >index ee9b7519fe73..d70320da85e4 100644 >--- a/drivers/gpu/drm/i915/intel_hdcp.c >+++ b/drivers/gpu/drm/i915/intel_hdcp.c >@@ -1145,6 +1145,135 @@ static int hdcp2_session_key_exchange(struct >intel_connector *connector) > return 0; > } > >+/* >+ * Lib endianness functions are aligned for 16/32/64 bits. Since here >+sequence >+ * num is 24bits developed a small conversion function. >+ */ >+static inline void reverse_endianness(u8 *dest, size_t dst_sz, u8 *src) This function is already defined and used in mei layer. Define this in some common header file and use instead of duplicating it here. May be in below file: <drm/drm_connector.h> >+{ >+ u32 index; >+ >+ if (dest != NULL && dst_sz != 0) { >+ for (index = 0; index < dst_sz && index < sizeof(u32); >+ index++) { >+ dest[dst_sz - index - 1] = src[index]; >+ } >+ } >+} >+ >+static >+int hdcp2_propagate_stream_management_info(struct intel_connector >+*connector) { >+ struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector); >+ struct intel_hdcp *hdcp = &connector->hdcp; >+ union { >+ struct hdcp2_rep_stream_manage stream_manage; >+ struct hdcp2_rep_stream_ready stream_ready; >+ } msgs; >+ const struct intel_hdcp_shim *shim = hdcp->hdcp_shim; >+ int ret; >+ >+ /* Prepare RepeaterAuth_Stream_Manage msg */ >+ msgs.stream_manage.msg_id = HDCP_2_2_REP_STREAM_MANAGE; >+ reverse_endianness(msgs.stream_manage.seq_num_m, >HDCP_2_2_SEQ_NUM_LEN, >+ (u8 *)&hdcp->seq_num_m); >+ >+ /* K no of streams is fixed as 1. Stored as big-endian. */ >+ msgs.stream_manage.k = __swab16(1); >+ >+ /* For HDMI this is forced to be 0x0. For DP SST also this is 0x0. */ >+ msgs.stream_manage.streams[0].stream_id = 0; >+ msgs.stream_manage.streams[0].stream_type = hdcp->content_type; >+ >+ /* Send it to Repeater */ >+ ret = shim->write_2_2_msg(intel_dig_port, &msgs.stream_manage, >+ sizeof(msgs.stream_manage)); >+ if (ret < 0) >+ return ret; >+ >+ ret = shim->read_2_2_msg(intel_dig_port, >HDCP_2_2_REP_STREAM_READY, >+ &msgs.stream_ready, >sizeof(msgs.stream_ready)); >+ if (ret < 0) >+ return ret; >+ >+ hdcp->mei_data.seq_num_m = hdcp->seq_num_m; >+ hdcp->mei_data.streams[0].stream_type = hdcp->content_type; >+ >+ ret = hdcp2_verify_mprime(hdcp, &msgs.stream_ready); >+ if (ret < 0) >+ return ret; >+ >+ hdcp->seq_num_m++; >+ >+ if (hdcp->seq_num_m > HDCP_2_2_SEQ_NUM_MAX) { >+ DRM_DEBUG_KMS("seq_num_m roll over.\n"); >+ return -1; >+ } Leave a blank line. >+ return 0; >+} >+ >+static >+int hdcp2_authenticate_repeater_topology(struct intel_connector >+*connector) { >+ struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector); >+ struct intel_hdcp *hdcp = &connector->hdcp; >+ union { >+ struct hdcp2_rep_send_receiverid_list recvid_list; >+ struct hdcp2_rep_send_ack rep_ack; >+ } msgs; >+ const struct intel_hdcp_shim *shim = hdcp->hdcp_shim; >+ uint8_t *rx_info; >+ uint32_t seq_num_v; >+ int ret; >+ >+ ret = shim->read_2_2_msg(intel_dig_port, >HDCP_2_2_REP_SEND_RECVID_LIST, >+ &msgs.recvid_list, sizeof(msgs.recvid_list)); >+ if (ret < 0) >+ return ret; >+ >+ rx_info = msgs.recvid_list.rx_info; >+ >+ if (HDCP_2_2_MAX_CASCADE_EXCEEDED(rx_info[1]) || >+ HDCP_2_2_MAX_DEVS_EXCEEDED(rx_info[1])) { >+ DRM_DEBUG_KMS("Topology Max Size Exceeded\n"); >+ return -1; >+ } >+ >+ /* Converting and Storing the seq_num_v to local variable as DWORD */ >+ reverse_endianness((u8 *)&seq_num_v, HDCP_2_2_SEQ_NUM_LEN, >+ msgs.recvid_list.seq_num_v); >+ >+ if (seq_num_v < hdcp->seq_num_v) { >+ /* Roll over of the seq_num_v from repeater. Reauthenticate. */ >+ DRM_DEBUG_KMS("Seq_num_v roll over.\n"); >+ return -1; >+ } >+ >+ ret = hdcp2_verify_rep_topology_prepare_ack(hdcp, &msgs.recvid_list, >+ &msgs.rep_ack); >+ if (ret < 0) >+ return ret; >+ >+ hdcp->seq_num_v = seq_num_v; >+ ret = shim->write_2_2_msg(intel_dig_port, &msgs.rep_ack, >+ sizeof(msgs.rep_ack)); >+ if (ret < 0) >+ return ret; >+ >+ return 0; >+} >+ >+static int hdcp2_authenticate_repeater(struct intel_connector >+*connector) { >+ int ret; >+ >+ ret = hdcp2_authenticate_repeater_topology(connector); >+ if (ret < 0) >+ return ret; >+ >+ return hdcp2_propagate_stream_management_info(connector); >+} >+ > static int hdcp2_authenticate_sink(struct intel_connector *connector) { > struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector); >@@ -1186,6 +1315,12 @@ static int hdcp2_authenticate_sink(struct >intel_connector *connector) > sizeof(stream_type_msg)); > if (ret < 0) > return ret; >+ } else if (hdcp->is_repeater) { >+ ret = hdcp2_authenticate_repeater(connector); >+ if (ret < 0) { >+ DRM_DEBUG_KMS("Repeater Auth Failed. Err: %d\n", >ret); >+ return ret; >+ } > } > > hdcp->mei_data.streams[0].stream_type = hdcp->content_type; >-- >2.7.4 > >_______________________________________________ >Intel-gfx mailing list >Intel-gfx@xxxxxxxxxxxxxxxxxxxxx >https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
