Hi Dave -
drm-intel-next-2018-04-13:
First drm/i915 feature batch heading for v4.18:
- drm-next backmerge to fix build (Rodrigo)
- GPU documentation improvements (Kevin)
- GuC and HuC refactoring, host/GuC communication, logging, fixes, and more
(mostly Michal and Michał, also Jackie, Michel and Piotr)
- PSR and PSR2 enabling and fixes (DK, José, Rodrigo and Chris)
- Selftest updates (Chris, Daniele)
- DPLL management refactoring (Lucas)
- DP MST fixes (Lyude and DK)
- Watermark refactoring and changes to support NV12 (Mahesh)
- NV12 prep work (Chandra)
- Icelake Combo PHY enablers (Manasi)
- Perf OA refactoring and ICL enabling (Lionel)
- ICL enabling (Oscar, Paulo, Nabendu, Mika, Kelvin, Michel)
- Workarounds refactoring (Oscar)
- HDCP fixes and improvements (Ramalingam, Radhakrishna)
- Power management fixes (Imre)
- Various display fixes (Maarten, Ville, Vidya, Jani, Gaurav)
- debugfs for FIFO underrun clearing (Maarten)
- Execlist improvements (Chris)
- Reset improvements (Chris)
- Plenty of things here and there I overlooked and/or didn't understand... (Everyone)
BR,
Jani.
The following changes since commit 694f54f680f7fd8e9561928fbfc537d9afbc3d79:
Merge branch 'drm-misc-next-fixes' of git://anongit.freedesktop.org/drm/drm-misc into drm-next (2018-03-29 09:25:13 +1000)
are available in the git repository at:
git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-next-2018-04-13
for you to fetch changes up to fadec6eefe232696c5c471b40df33e6db616e854:
drm/i915: Update DRIVER_DATE to 20180413 (2018-04-13 12:20:58 +0300)
----------------------------------------------------------------
First drm/i915 feature batch heading for v4.18:
- drm-next backmerge to fix build (Rodrigo)
- GPU documentation improvements (Kevin)
- GuC and HuC refactoring, host/GuC communication, logging, fixes, and more
(mostly Michal and Michał, also Jackie, Michel and Piotr)
- PSR and PSR2 enabling and fixes (DK, José, Rodrigo and Chris)
- Selftest updates (Chris, Daniele)
- DPLL management refactoring (Lucas)
- DP MST fixes (Lyude and DK)
- Watermark refactoring and changes to support NV12 (Mahesh)
- NV12 prep work (Chandra)
- Icelake Combo PHY enablers (Manasi)
- Perf OA refactoring and ICL enabling (Lionel)
- ICL enabling (Oscar, Paulo, Nabendu, Mika, Kelvin, Michel)
- Workarounds refactoring (Oscar)
- HDCP fixes and improvements (Ramalingam, Radhakrishna)
- Power management fixes (Imre)
- Various display fixes (Maarten, Ville, Vidya, Jani, Gaurav)
- debugfs for FIFO underrun clearing (Maarten)
- Execlist improvements (Chris)
- Reset improvements (Chris)
- Plenty of things here and there I overlooked and/or didn't understand... (Everyone)
----------------------------------------------------------------
Andy Shevchenko (1):
i915: Re-use DEFINE_SHOW_ATTRIBUTE() macro
Chandra Konduru (3):
drm/i915: Set scaler mode for NV12
drm/i915: Update format_is_yuv() to include NV12
drm/i915: Upscale scaler max scale for NV12
Chris Wilson (52):
drm/i915: Only prune fences after wait-for-all
drm/i915: Kick the rps worker when changing the boost frequency
drm/i915: Index the ring frequency table by HW frequency range
drm/i915: Push irq_shift from gen8_cs_irq_handler() to caller
drm/i915: Finish the wait-for-wedge by retiring all the inflight requests
drm/i915: Update ring position from request on retiring
drm/i915: Include ring->emit in debugging
drm/i915: Wrap engine->schedule in RCU locks for set-wedge protection
drm/i915: Only call tasklet_kill() on the first prepare_reset
drm/i915: Remove the impedance mismatch around intel_engine_enable_signaling
drm/i915: Remove variable length arrays from sseu debugfs printers
drm/i915: Warn against variable length arrays
drm/i915: Use sseu size for determining eu_regs[]
drm/i915: Show GEM_TRACE when detecting a failed GPU idle
drm/i915: Check rq->timeline before deference
drm/i915: Trace GEM steps between submit and wedging
drm/i915: Stop engines when declaring the machine wedged
drm/i915/stolen: Switch from DEBUG_KMS to DEBUG_DRIVER
drm/i915/stolen: Checkpatch cleansing
drm/i915/stolen: Deduce base of reserved portion as top-size on vlv
drm/i915: Prefer memset64() when filling the iomap
drm/i915: Trim error mask to known engines
drm/i915: Specify which engines to reset following semaphore/event lockups
drm/i915: Add control flags to i915_handle_error()
drm/i915/execlists: Use a locked clear_bit() for synchronisation with interrupt
drm/i915: Fix tracing of submit seqno
drm/i915: Remove local timeline var from submit/unsubmit
drm/i915/selftests: Include the trace as a debug aide
drm/i915/selftests: Stress resets-vs-request-priority
drm/i915: Use full serialisation around engine->irq_posted
drm/i915: Flush pending interrupt following a GPU reset
drm/i915: Actually flush interrupts on reset not just wedging
drm/i915/execlists: Clear user-active flag on preemption completion
drm/i915: Include submission tasklet state in engine dump
drm/i915/execlists: Avoid kicking the submission too early for rescheduling
drm/i915/execlists: Reset ring registers on rebinding contexts
drm/i915: Include the HW breadcrumb whenever we trace the global_seqno
drm/i915: Avoid sleeping inside per-engine reset
drm/i915: Only warn for might_sleep() before a slow wait_for_register
drm/i915/execlists: Track begin/end of execlists submission sequences
drm/i915: Store preemption capability in engine->flags
drm/i915/selftests: Add basic sanitychecks for execlists
drm/i915: Only call finish_reset after a prepare_reset
drm/i915/selftests: Avoid repeatedly harming the same innocent context
drm/i915/selftests: Rename wait_for_hang() to wait_until_running()
drm/i915: Split out parking from the idle worker for reuse
drm/i915: Treat i915_reset_engine() as guilty until proven innocent
drm/i915: Pass the set of guilty engines to i915_reset()
drm/i915/psr: Chase psr.enabled only under the psr.lock
drm/i915: Don't fiddle with rps/rc6 across GPU reset
drm/i915/guc: Replace %phn with %ph
drm/i915/execlists: Set queue priority from secondary port
Daniel Vetter (1):
drm/i915: Select STACKDEPOT for DRM_I915_DEBUG
Daniele Ceraolo Spurio (4):
drm/i915: store all mmio bases in intel_engines
drm/i915: add a selftest for the mmio_bases table
drm/i915: use engine->irq_keep_mask when resetting irqs
drm/i915: move gen8 irq shifts to intel_lrc.c
Dhinakaran Pandiyan (8):
drm/i915/frontbuffer: Pull frontbuffer_flush out of gem_obj_pin_to_display
drm/i915/frontbuffer: HW tracking for cursor moves to fix PSR lags.
drm/i915/psr: Remove PSR active flag from debugfs
drm/i915/psr: Comment to clarify SRD_DEBUG is called PSR_MASK SKL+
drm/i915/dp: Write to SET_POWER dpcd to enable MST hub.
drm/i915/psr: Move PSR aux setup to it's own function.
drm/i915/psr: Remove open-coded PSR AUX transactions for SKL+
drm/i915/icl: HPD pin for port F
Gaurav K Singh (1):
drm/i915/audio: Fix audio enumeration issue on BXT
Imre Deak (2):
drm/i915: Fix hibernation with ACPI S0 target state
drm/i915/gen9_lp: Increase DDI PHY0 power well enabling timeout
Jackie Li (5):
drm/i915/guc: Rename guc_ggtt_offset to intel_guc_ggtt_offset
drm/i915: Implement dynamic GuC WOPCM offset and size calculation
drm/i915: Add support to return CNL specific reserved WOPCM size
drm/i915: Add HuC firmware size related restriction for Gen9 and CNL A0
drm/i915/guc: Check the locking status of GuC WOPCM registers
Jani Nikula (5):
drm/i915/icl: do not save DDI A/E sharing bit for ICL
drm/i915/bios: remove duplicated code
drm/i915/bios: filter out invalid DDC pins from VBT child devices
drm/i915/bios: reduce the scope of some local variables in parse_ddi_port()
drm/i915: Update DRIVER_DATE to 20180413
José Roberto de Souza (9):
drm: Add DP PSR2 sink enable bit
drm: Add DP last received PSR SDP VSC register and bits
drm/i915/psr: Nuke aux frame sync
drm/i915/psr: Tie PSR2 support to Y coordinate requirement
drm/i915/psr/cnl: Enable Y-coordinate support in source
drm/i915/psr: Do not override PSR2 sink support
drm/i915/psr: Use PSR2 macro for PSR2
drm/i915/psr: Cache sink synchronization latency
drm/i915/psr: Set DPCD PSR2 enable bit when needed
Kelvin Gardiner (2):
drm/i915/icl: Update subslice define for ICL 11
drm/i915/icl: Added ICL 11 slice, subslice and EU fuse detection
Kevin Rogovin (3):
drm/i915: Narration overview on GEM
drm/i915: Add link to documentation in i915_gem_execbuffer.c
drm/i915: Describe the bottom of stack in processing a batchbuffer
Lionel Landwerlin (6):
drm/i915/perf: enable perf support on ICL
drm/i915/perf: check the value of PROP_SAMPLE_OA uapi parameter
drm/i915/perf: simplify OA unit enabling on gen7
drm/i915/perf: remove empty line
drm/i915: rename PPGTT/GGTT fields OA registers
drm/i915/perf: add more debug message on perf open & configs
Lucas De Marchi (8):
drm/i915: Reword warning for missing cases
drm/i915: move dpll_info to header
drm/i915: add dpll_info inside intel_shared_dpll
drm/i915: use funcs from intel_shared_dpll.info
drm/i915: use name from intel_shared_dpll.info
drm/i915: use id from intel_shared_dpll.info
drm/i915: use flags from dpll_info embedded in intel_shared_dpll
drm/i915: reorder dpll_info members
Lyude Paul (2):
drm/i915: Remove unused DP_LINK_CHECK_TIMEOUT
drm/i915/dp: Send DPCD ON for MST before phy_up
Maarten Lankhorst (5):
drm/i915: Handle pipe CRC around enabling/disabling pipe.
drm/i915: Change use get_new_plane_state instead of existing plane state
drm/i915: Remove get_existing_crtc_state
drm/i915: Remove last references to drm_atomic_get_existing* macros
drm/i915: Add debugfs file to clear FIFO underruns.
Mahesh Kumar (11):
drm/i915/cnl; Add macro to get PORT_TX register
drm/i915/cnl: Kill _MMIO_PORT6 macro
drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values
drm/i915/skl+: refactor WM calculation for NV12
drm/i915/skl+: add NV12 in skl_format_to_fourcc
drm/i915/skl+: support verification of DDB HW state for NV12
drm/i915/skl+: NV12 related changes for WM
drm/i915/skl+: pass skl_wm_level struct to wm compute func
drm/i915/skl+: make sure higher latency level has higher wm value
drm/i915/skl+: nv12 workaround disable WM level 1-7
drm/i915/skl: split skl_compute_ddb function
Manasi Navare (4):
drm/i915/icl: Add register definitions for Combo PHY vswing sequences.
drm/i915/icl: Add Combo PHY DDI Buffer translation tables for Icelake.
drm/i915/icl: Add register defs for voltage swing sequences for MG PHY DDI
drm/i915/icl: Add Voltage swing table for MG PHY DDI Buffer
Michal Wajdeczko (29):
drm/i915/guc: Move GuC notification handling to separate function
drm/i915: Include i915_reg.h in intel_ringbuffer.h
drm/i915: Change parameters order in i915_gem_batch_pool_init
drm/i915: Make header i915_pmu.h more robust
drm/i915: Move i915_gpu_error into its own header
drm/i915/uc: Sanitize uC options early
drm/i915/uc: Sanitize uC together with GEM
drm/i915: Split GPU commands definitions into separate header
drm/i915/guc: Update syntax of GuC log functions
drm/i915/guc: Fix build break on config without DEBUG_FS
drm/i915/huc: Check HuC status in dedicated function
drm/i915/guc: Unify naming of private GuC action functions
drm/i915/guc: Drop union guc_log_control
drm/i915/guc: Move enable/disable msg functions to GuC header
drm/i915/guc: Handle GuC log flush event in dedicated function
drm/i915/guc: Unify parameters of public CT functions
drm/i915: Reorder early initialization
drm/i915/uc: Fetch uC firmware in init_early
drm/i915/guc: Add documentation for MMIO based communication
drm/i915/guc: Add support for data reporting in GuC responses
drm/i915/guc: Prepare send() function to accept bigger response
drm/i915/guc: Implement response handling in send_mmio()
drm/i915/guc: Make event handler a virtual function
drm/i915/guc: Prepare to handle messages from CT RECV buffer
drm/i915/guc: Use better name for helper wait function
drm/i915/guc: Implement response handling in send_ct()
drm/i915/guc: Prepare to process incoming requests from CT
drm/i915/guc: Handle default action received over CT
drm/i915/guc: Trace messages from CT while in debug
Michał Winiarski (15):
drm/i915/guc: Tidy guc_log_control
drm/i915/guc: Create common entry points for log register/unregister
drm/i915/guc: Keep GuC interrupts enabled when using GuC
drm/i915/guc: Log runtime should consist of both mapping and relay
drm/i915/guc: Merge log relay file and channel creation
drm/i915/guc: Flush directly in log unregister
drm/i915/guc: Split relay control and GuC log level
drm/i915/guc: Move check for fast memcpy_wc to relay creation
drm/i915/guc: Get rid of GuC log runtime
drm/i915/guc: Always print log stats in i915_guc_info when using GuC
drm/i915/guc: Don't print out relay statistics when relay is disabled
drm/i915/guc: Allow user to control default GuC logging
drm/i915/guc: Default to non-verbose GuC logging
drm/i915/guc: Demote GuC error messages
drm/i915/guc: Don't try to enable GuC logging when we're not using GuC
Michel Thierry (2):
drm/i915/guc: enable guc interrupts unconditionally in uc_resume
drm/i915/icl: Add reset control register changes
Mika Kuoppala (3):
drm/i915: Avoid setting ring freq on invalid rps freqs
drm/i915/icl: Use hw engine class, instance to find irq handler
drm/i915/cnl: Use mmio access to context status buffer
Nabendu Maiti (1):
drm/i915/icl: Added 5k source scaling support for Gen11 platform
Oscar Mateo (7):
drm/i915/icl: Check for fused-off VDBOX and VEBOX instances
drm/i915/icl: Enable the extra video decode and enhancement boxes for Icelake 11
drm/i915/icl: Handle RPS interrupts correctly for Gen11
drm/i915/icl: Deal with GT INT DW correctly
drm/i915/icl: Enable RC6 and RPS in Gen11
drm/i915: Move a bunch of workaround-related code to its own file
drm/i915: Split out functions for different kinds of workarounds
Paulo Zanoni (2):
drm/i915: protect macro parameters in SWING_SEL_{UPP,LO}WER
drm/i915/gen11: add support for reading the timestamp frequency
Piotr Piórkowski (1):
drm/i915/guc: Fix null pointer dereference when GuC FW is not available
Radhakrishna Sripada (1):
drm/i915: Fix memory leak in intel_hdcp auth
Ramalingam C (3):
drm/i915: Read HDCP R0 thrice in case of mismatch
drm/i915: Read Vprime thrice incase of mismatch
drm/i915: Check hdcp key loadability
Rodrigo Vivi (4):
drm/i915/psr: Display WA 0884 applied broadly for more HW tracking.
drm/i915/psr: Use more PSR HW tracking.
drm/i915: Move CUR SURFLIVE definition to a better place.
Merge airlied/drm-next into drm-intel-next-queued
Tvrtko Ursulin (5):
drm/i915/pmu: Work around compiler warnings on some kernel configs
drm/i915: Skip logging impossible slices
drm/i915: Enclose for_each_engine_masked macro arguments in parentheses
drm/i915/execlists: Log fence context & seqno throughout GEM_TRACE
drm/i915/pmu: Inspect runtime PM state more carefully while estimating RC6
Vidya Srinivas (2):
drm/i915: Display WA 827
drm/i915: Enable YUV to RGB for Gen10 in Plane Ctrl Reg
Ville Syrjälä (3):
drm/i915: Don't initialize plane_to_crtc_mapping[] on SKL+
drm/i915: Kill the remaining CHV HBR2 leftovers
drm/i915: Don't spew errors when resetting HDMI scrambling/bit clock ratio fails
Xidong Wang (1):
drm/i915: Do no use kfree() to free a kmem_cache_alloc() return value
Yaodong Li (1):
drm/i915: Use correct reST syntax for WOPCM and GuC kernel-doc diagrams
Documentation/gpu/i915.rst | 141 +++-
drivers/gpu/drm/i915/Kconfig.debug | 13 +
drivers/gpu/drm/i915/Makefile | 11 +-
drivers/gpu/drm/i915/gvt/debugfs.c | 13 +-
drivers/gpu/drm/i915/i915_debugfs.c | 318 +++++---
drivers/gpu/drm/i915/i915_drv.c | 66 +-
drivers/gpu/drm/i915/i915_drv.h | 389 +---------
drivers/gpu/drm/i915/i915_gem.c | 237 ++++--
drivers/gpu/drm/i915/i915_gem.h | 7 +
drivers/gpu/drm/i915/i915_gem_batch_pool.c | 30 +-
drivers/gpu/drm/i915/i915_gem_batch_pool.h | 29 +-
drivers/gpu/drm/i915/i915_gem_context.c | 11 +-
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 31 +-
drivers/gpu/drm/i915/i915_gem_stolen.c | 163 ++--
drivers/gpu/drm/i915/i915_gpu_error.c | 1 +
drivers/gpu/drm/i915/i915_gpu_error.h | 362 +++++++++
drivers/gpu/drm/i915/i915_irq.c | 366 +++++----
drivers/gpu/drm/i915/i915_oa_icl.c | 118 +++
drivers/gpu/drm/i915/i915_oa_icl.h | 34 +
drivers/gpu/drm/i915/i915_params.h | 2 +-
drivers/gpu/drm/i915/i915_pci.c | 1 +
drivers/gpu/drm/i915/i915_perf.c | 69 +-
drivers/gpu/drm/i915/i915_pmu.c | 64 +-
drivers/gpu/drm/i915/i915_pmu.h | 30 +-
drivers/gpu/drm/i915/i915_reg.h | 644 +++++++---------
drivers/gpu/drm/i915/i915_request.c | 125 ++-
drivers/gpu/drm/i915/i915_utils.h | 4 +-
drivers/gpu/drm/i915/intel_atomic.c | 19 +-
drivers/gpu/drm/i915/intel_audio.c | 2 +-
drivers/gpu/drm/i915/intel_bios.c | 28 +-
drivers/gpu/drm/i915/intel_breadcrumbs.c | 21 +-
drivers/gpu/drm/i915/intel_ddi.c | 154 +++-
drivers/gpu/drm/i915/intel_device_info.c | 169 +++-
drivers/gpu/drm/i915/intel_device_info.h | 4 +-
drivers/gpu/drm/i915/intel_display.c | 251 ++++--
drivers/gpu/drm/i915/intel_dp.c | 21 +-
drivers/gpu/drm/i915/intel_dp_mst.c | 8 +-
drivers/gpu/drm/i915/intel_dpio_phy.c | 11 +-
drivers/gpu/drm/i915/intel_dpll_mgr.c | 253 +++---
drivers/gpu/drm/i915/intel_dpll_mgr.h | 56 +-
drivers/gpu/drm/i915/intel_drv.h | 58 +-
drivers/gpu/drm/i915/intel_engine_cs.c | 796 +++----------------
drivers/gpu/drm/i915/intel_fbc.c | 28 +
drivers/gpu/drm/i915/intel_fbdev.c | 5 +-
drivers/gpu/drm/i915/intel_frontbuffer.c | 2 +-
drivers/gpu/drm/i915/intel_gpu_commands.h | 274 +++++++
drivers/gpu/drm/i915/intel_guc.c | 211 +++--
drivers/gpu/drm/i915/intel_guc.h | 82 +-
drivers/gpu/drm/i915/intel_guc_ads.c | 8 +-
drivers/gpu/drm/i915/intel_guc_ct.c | 545 +++++++++++--
drivers/gpu/drm/i915/intel_guc_ct.h | 18 +-
drivers/gpu/drm/i915/intel_guc_fw.c | 7 +-
drivers/gpu/drm/i915/intel_guc_fwif.h | 157 +++-
drivers/gpu/drm/i915/intel_guc_log.c | 544 +++++--------
drivers/gpu/drm/i915/intel_guc_log.h | 59 +-
drivers/gpu/drm/i915/intel_guc_reg.h | 14 +-
drivers/gpu/drm/i915/intel_guc_submission.c | 47 +-
drivers/gpu/drm/i915/intel_hangcheck.c | 13 +-
drivers/gpu/drm/i915/intel_hdcp.c | 185 +++--
drivers/gpu/drm/i915/intel_hdmi.c | 40 +-
drivers/gpu/drm/i915/intel_hotplug.c | 3 +
drivers/gpu/drm/i915/intel_huc.c | 30 +-
drivers/gpu/drm/i915/intel_huc.h | 7 +
drivers/gpu/drm/i915/intel_huc_fw.c | 8 +-
drivers/gpu/drm/i915/intel_lrc.c | 261 +++++--
drivers/gpu/drm/i915/intel_overlay.c | 1 +
drivers/gpu/drm/i915/intel_pipe_crc.c | 53 +-
drivers/gpu/drm/i915/intel_pm.c | 474 +++++++-----
drivers/gpu/drm/i915/intel_psr.c | 327 ++++----
drivers/gpu/drm/i915/intel_ringbuffer.c | 22 +-
drivers/gpu/drm/i915/intel_ringbuffer.h | 43 +-
drivers/gpu/drm/i915/intel_sprite.c | 7 +-
drivers/gpu/drm/i915/intel_uc.c | 132 ++--
drivers/gpu/drm/i915/intel_uc.h | 5 +-
drivers/gpu/drm/i915/intel_uc_fw.c | 13 +-
drivers/gpu/drm/i915/intel_uc_fw.h | 22 +
drivers/gpu/drm/i915/intel_uncore.c | 168 +++-
drivers/gpu/drm/i915/intel_uncore.h | 1 +
drivers/gpu/drm/i915/intel_wopcm.c | 275 +++++++
drivers/gpu/drm/i915/intel_wopcm.h | 31 +
drivers/gpu/drm/i915/intel_workarounds.c | 856 +++++++++++++++++++++
drivers/gpu/drm/i915/intel_workarounds.h | 17 +
.../gpu/drm/i915/selftests/i915_live_selftests.h | 1 +
.../gpu/drm/i915/selftests/i915_mock_selftests.h | 1 +
drivers/gpu/drm/i915/selftests/intel_engine_cs.c | 58 ++
drivers/gpu/drm/i915/selftests/intel_hangcheck.c | 314 +++++---
drivers/gpu/drm/i915/selftests/intel_lrc.c | 507 ++++++++++++
include/drm/drm_dp_helper.h | 10 +
88 files changed, 7291 insertions(+), 3725 deletions(-)
create mode 100644 drivers/gpu/drm/i915/i915_gpu_error.h
create mode 100644 drivers/gpu/drm/i915/i915_oa_icl.c
create mode 100644 drivers/gpu/drm/i915/i915_oa_icl.h
create mode 100644 drivers/gpu/drm/i915/intel_gpu_commands.h
create mode 100644 drivers/gpu/drm/i915/intel_wopcm.c
create mode 100644 drivers/gpu/drm/i915/intel_wopcm.h
create mode 100644 drivers/gpu/drm/i915/intel_workarounds.c
create mode 100644 drivers/gpu/drm/i915/intel_workarounds.h
create mode 100644 drivers/gpu/drm/i915/selftests/intel_engine_cs.c
create mode 100644 drivers/gpu/drm/i915/selftests/intel_lrc.c
--
Jani Nikula, Intel Open Source Technology Center
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