On 17/04/18 20:31, Linus Walleij wrote:
On Tue, Apr 17, 2018 at 3:12 PM, Robin Murphy <robin.murphy@xxxxxxx> wrote:
On 17/04/18 13:32, Linus Walleij wrote:
[...]
Unfortunately there is just one single vexpress core tile in the
upstream kernel that define a CLCD controller, the CA9 (4xA9)
that I am using. All the others just use the MB CLCD.
I am thinking there is some never finished DTS upstreaming
here that ought to happen so we use the core tile CLCD on some
other boards as well.
Barring custom FPGA images, I think V2P-CA9 *is* the only VExpress tile
implementing PL11x; all the more recent test chips had HDLCD instead.
Yup it looks like that.
I am restructuring the code to look for any graphics on the
core tile and only turn on the motherboard CLCD if there is
no CLCD or HDLCD on the core tile, e.g. if that device node has
been set to "disabled" or the HDLCD driver is not compiled in
but the CLCD driver is.
I found some vague mentions of a LCD display that can be
connected to the motherboard, so that would then be sitting
on the CLCD, is this something you ARM guys have seen
around? In that case I guess the VExpress (etc) would actually
be able to have two screens, one LCD panel on the motherboard
CLCD and a DVI from the core tile.
I don't see anything in the V2M motherboard manual to suggest the IOFPGA
CLCD output is routed anywhere other than the DVI mux, and there are
certainly no unaccounted-for connectors on the VExpress version
currently in front of me (HBI-0190D). The only things I'm immediately
aware of having a panel connector directly on the board are
Integrator/CP and RealView EB.
Robin.
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