tree: git://people.freedesktop.org/~agd5f/linux.git drm-next-4.18-wip
head: 5d404d3139a4624892a12683240abfae931ee849
commit: 2852a36199784540a872f42fa6dc7d8d51eee0d8 [43/120] drm/amd/display: Add vline IRQ programming for DCN
smatch warnings:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_optc.c:127 get_start_vline() warn: unsigned 'vertical_line_start' is never less than zero.
vim +/vertical_line_start +127 drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_optc.c
95
96 static uint32_t get_start_vline(struct timing_generator *optc, const struct dc_crtc_timing *dc_crtc_timing)
97 {
98 struct dc_crtc_timing patched_crtc_timing;
99 uint32_t vesa_sync_start;
100 uint32_t asic_blank_end;
101 uint32_t interlace_factor;
102 uint32_t vertical_line_start;
103
104 patched_crtc_timing = *dc_crtc_timing;
105 optc1_apply_front_porch_workaround(optc, &patched_crtc_timing);
106
107 vesa_sync_start = patched_crtc_timing.h_addressable +
108 patched_crtc_timing.h_border_right +
109 patched_crtc_timing.h_front_porch;
110
111 asic_blank_end = patched_crtc_timing.h_total -
112 vesa_sync_start -
113 patched_crtc_timing.h_border_left;
114
115 interlace_factor = patched_crtc_timing.flags.INTERLACE ? 2 : 1;
116
117 vesa_sync_start = patched_crtc_timing.v_addressable +
118 patched_crtc_timing.v_border_bottom +
119 patched_crtc_timing.v_front_porch;
120
121 asic_blank_end = (patched_crtc_timing.v_total -
122 vesa_sync_start -
123 patched_crtc_timing.v_border_top)
124 * interlace_factor;
125
126 vertical_line_start = asic_blank_end - optc->dlg_otg_param.vstartup_start + 1;
> 127 if (vertical_line_start < 0) {
128 ASSERT(0);
129 vertical_line_start = 0;
130 }
131
132 return vertical_line_start;
133 }
134
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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